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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-10 02:58:51 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-10 02:58:51 +0000 |
| commit | 2fb5b3157826043df780cb52e7e3b773ce7fdd66 (patch) | |
| tree | 0b931b906005e9d05ce16bf4d2c9c00fa01e5ac7 /llvm/lib/CodeGen/MachineCSE.cpp | |
| parent | 7bb282ebb11a053f4a2559280c17a2797008f5b8 (diff) | |
| download | bcm5719-llvm-2fb5b3157826043df780cb52e7e3b773ce7fdd66.tar.gz bcm5719-llvm-2fb5b3157826043df780cb52e7e3b773ce7fdd66.zip | |
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
llvm-svn: 123155
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineCSE.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp index 3e54784278c..60ad46a0d3b 100644 --- a/llvm/lib/CodeGen/MachineCSE.cpp +++ b/llvm/lib/CodeGen/MachineCSE.cpp @@ -116,7 +116,7 @@ bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI, if (!MO.isReg() || !MO.isUse()) continue; unsigned Reg = MO.getReg(); - if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) + if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; if (!MRI->hasOneNonDBGUse(Reg)) // Only coalesce single use copies. This ensure the copy will be @@ -300,7 +300,7 @@ bool MachineCSE::isProfitableToCSE(unsigned CSReg, unsigned Reg, bool HasVRegUse = false; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isUse() && MO.getReg() && + if (MO.isReg() && MO.isUse() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) { HasVRegUse = true; break; |
