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| author | Tim Northover <tnorthover@apple.com> | 2018-09-13 10:28:05 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2018-09-13 10:28:05 +0000 |
| commit | c15d47bb013e975da582c8fd786ba8234d70d75d (patch) | |
| tree | e13262451793600a29c0df26342fc954e1a8a79a /llvm/lib/CodeGen/MachineBlockPlacement.cpp | |
| parent | 95ac65bc32180744cbc67d4e82a0f6417fb92aa9 (diff) | |
| download | bcm5719-llvm-c15d47bb013e975da582c8fd786ba8234d70d75d.tar.gz bcm5719-llvm-c15d47bb013e975da582c8fd786ba8234d70d75d.zip | |
ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4.
The Technical Reference Manuals for these two CPUs state that branching
to an unaligned 32-bit instruction incurs an extra pipeline reload
penalty. That's bad.
This also enables the optimization at -Os since it costs on average one
byte per loop in return for 1 cycle per iteration, which is pretty good
going.
llvm-svn: 342127
Diffstat (limited to 'llvm/lib/CodeGen/MachineBlockPlacement.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineBlockPlacement.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp index 21350df624e..624d3365b4f 100644 --- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp +++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp @@ -2497,7 +2497,8 @@ void MachineBlockPlacement::alignBlocks() { // exclusively on the loop info here so that we can align backedges in // unnatural CFGs and backedges that were introduced purely because of the // loop rotations done during this layout pass. - if (F->getFunction().optForSize()) + if (F->getFunction().optForMinSize() || + (F->getFunction().optForSize() && !TLI->alignLoopsWithOptSize())) return; BlockChain &FunctionChain = *BlockToChain[&F->front()]; if (FunctionChain.begin() == FunctionChain.end()) |
