summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineBasicBlock.cpp
diff options
context:
space:
mode:
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2016-12-15 14:36:06 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2016-12-15 14:36:06 +0000
commit91b5cf8412a9fffdca96619f02f485c8c48bf852 (patch)
tree45cc792752ed1bae1559f8501bc5e485eda07fed /llvm/lib/CodeGen/MachineBasicBlock.cpp
parent2f7f0e7a480d760999f1973d8db76aee590cf83e (diff)
downloadbcm5719-llvm-91b5cf8412a9fffdca96619f02f485c8c48bf852.tar.gz
bcm5719-llvm-91b5cf8412a9fffdca96619f02f485c8c48bf852.zip
Extract LaneBitmask into a separate type
Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineBasicBlock.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 57684cdcc2f..df6dcee9bec 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -291,7 +291,7 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS << " Live Ins:";
for (const auto &LI : make_range(livein_begin(), livein_end())) {
OS << ' ' << PrintReg(LI.PhysReg, TRI);
- if (LI.LaneMask != ~0u)
+ if (!LI.LaneMask.all())
OS << ':' << PrintLaneMask(LI.LaneMask);
}
OS << '\n';
@@ -342,14 +342,14 @@ void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) {
return;
I->LaneMask &= ~LaneMask;
- if (I->LaneMask == 0)
+ if (I->LaneMask.none())
LiveIns.erase(I);
}
bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const {
livein_iterator I = find_if(
LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
- return I != livein_end() && (I->LaneMask & LaneMask) != 0;
+ return I != livein_end() && !(I->LaneMask & LaneMask).none();
}
void MachineBasicBlock::sortUniqueLiveIns() {
OpenPOWER on IntegriCloud