[MIRParser] Allow generic register specification on operand.

This completes r292321 by adding support for generic registers, e.g.:

  %2:_(s32) = G_ADD %0, %1

llvm-svn: 292550

1 files changed, 16 insertions, 12 deletions

diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index ff6d3097959..e302de26d1f 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -883,8 +883,8 @@ bool MIParser::parseRegister(unsigned &Reg, VRegInfo *&Info) {
 }
 
 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
-  if (Token.isNot(MIToken::Identifier))
-    return error("expected a register class or register bank name");
+  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
+    return error("expected '_', register class, or register bank name");
   StringRef::iterator Loc = Token.location();
   StringRef Name = Token.stringValue();
 
@@ -914,26 +914,30 @@ bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
     llvm_unreachable("Unexpected register kind");
   }
 
-  // Should be a register bank.
-  auto RBNameI = PFS.Names2RegBanks.find(Name);
+  // Should be a register bank or a generic register.
+  const RegisterBank *RegBank = nullptr;
+  if (Name != "_") {
+    auto RBNameI = PFS.Names2RegBanks.find(Name);
+    if (RBNameI == PFS.Names2RegBanks.end())
+      return error(Loc, "expected '_', register class, or register bank name");
+    RegBank = RBNameI->getValue();
+  }
+
   lex();
-  if (RBNameI == PFS.Names2RegBanks.end())
-    return error(Loc, "expected a register class or register bank name");
 
-  const RegisterBank &RegBank = *RBNameI->getValue();
   switch (RegInfo.Kind) {
   case VRegInfo::UNKNOWN:
   case VRegInfo::GENERIC:
   case VRegInfo::REGBANK:
-    RegInfo.Kind = VRegInfo::REGBANK;
-    if (RegInfo.Explicit && RegInfo.D.RegBank != &RegBank)
-      return error(Loc, "conflicting register banks");
-    RegInfo.D.RegBank = &RegBank;
+    RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
+    if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
+      return error(Loc, "conflicting generic register banks");
+    RegInfo.D.RegBank = RegBank;
     RegInfo.Explicit = true;
     return false;
 
   case VRegInfo::NORMAL:
-    return error(Loc, "register class specification on normal register");
+    return error(Loc, "register bank specification on normal register");
   }
   llvm_unreachable("Unexpected register kind");
 }