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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2016-07-19 19:48:36 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2016-07-19 19:48:36 +0000
commit5a59b24bdd3b1836884d5792a527b84c6a74b148 (patch)
tree342a18933410bb50ea1a2f86d15f23666666d7a6 /llvm/lib/CodeGen/MIRParser
parent0313a08a1a8634442c9eaa4dca7c619beb7ed3d3 (diff)
downloadbcm5719-llvm-5a59b24bdd3b1836884d5792a527b84c6a74b148.tar.gz
bcm5719-llvm-5a59b24bdd3b1836884d5792a527b84c6a74b148.zip
[GlobalISel] Mark newly-created gvregs as having a bank.
Also verify that we never try to set the size of a vreg associated to a register class. Report an error when we encounter that in MIR. Fix a testcase that hit that error and had a size for no reason. llvm-svn: 276012
Diffstat (limited to 'llvm/lib/CodeGen/MIRParser')
-rw-r--r--llvm/lib/CodeGen/MIRParser/MIParser.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index b3fd16f1588..8937ee81c6a 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -973,14 +973,18 @@ bool MIParser::parseRegisterOperand(MachineOperand &Dest,
TiedDefIdx = Idx;
}
} else if (consumeIfPresent(MIToken::lparen)) {
+ MachineRegisterInfo &MRI = MF.getRegInfo();
+
// Virtual registers may have a size with GlobalISel.
if (!TargetRegisterInfo::isVirtualRegister(Reg))
return error("unexpected size on physical register");
+ if (MRI.getRegClassOrRegBank(Reg).is<const TargetRegisterClass *>())
+ return error("unexpected size on non-generic virtual register");
+
unsigned Size;
if (parseSize(Size))
return true;
- MachineRegisterInfo &MRI = MF.getRegInfo();
MRI.setSize(Reg, Size);
} else if (PFS.GenericVRegs.count(Reg)) {
// Generic virtual registers must have a size.
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