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author | Matthias Braun <matze@braunis.de> | 2017-12-18 23:19:44 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2017-12-18 23:19:44 +0000 |
commit | ef95969e5ba1cef78ae20a6104eb017fe57800b2 (patch) | |
tree | 2b8a27f96170cb78f792b27e365fd02dd28594af /llvm/lib/CodeGen/LiveStackAnalysis.cpp | |
parent | a4852d2c1994545d694c15dba9f8e6586ffd9704 (diff) | |
download | bcm5719-llvm-ef95969e5ba1cef78ae20a6104eb017fe57800b2.tar.gz bcm5719-llvm-ef95969e5ba1cef78ae20a6104eb017fe57800b2.zip |
LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFC
Filenames should match the name of the class they contain.
llvm-svn: 321037
Diffstat (limited to 'llvm/lib/CodeGen/LiveStackAnalysis.cpp')
-rw-r--r-- | llvm/lib/CodeGen/LiveStackAnalysis.cpp | 88 |
1 files changed, 0 insertions, 88 deletions
diff --git a/llvm/lib/CodeGen/LiveStackAnalysis.cpp b/llvm/lib/CodeGen/LiveStackAnalysis.cpp deleted file mode 100644 index b0e58b0e3e5..00000000000 --- a/llvm/lib/CodeGen/LiveStackAnalysis.cpp +++ /dev/null @@ -1,88 +0,0 @@ -//===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements the live stack slot analysis pass. It is analogous to -// live interval analysis except it's analyzing liveness of stack slots rather -// than registers. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CodeGen/LiveStackAnalysis.h" -#include "llvm/CodeGen/LiveIntervals.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/TargetRegisterInfo.h" -#include "llvm/CodeGen/TargetSubtargetInfo.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/raw_ostream.h" -using namespace llvm; - -#define DEBUG_TYPE "livestacks" - -char LiveStacks::ID = 0; -INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE, - "Live Stack Slot Analysis", false, false) -INITIALIZE_PASS_DEPENDENCY(SlotIndexes) -INITIALIZE_PASS_END(LiveStacks, DEBUG_TYPE, - "Live Stack Slot Analysis", false, false) - -char &llvm::LiveStacksID = LiveStacks::ID; - -void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const { - AU.setPreservesAll(); - AU.addPreserved<SlotIndexes>(); - AU.addRequiredTransitive<SlotIndexes>(); - MachineFunctionPass::getAnalysisUsage(AU); -} - -void LiveStacks::releaseMemory() { - // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd. - VNInfoAllocator.Reset(); - S2IMap.clear(); - S2RCMap.clear(); -} - -bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { - TRI = MF.getSubtarget().getRegisterInfo(); - // FIXME: No analysis is being done right now. We are relying on the - // register allocators to provide the information. - return false; -} - -LiveInterval & -LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { - assert(Slot >= 0 && "Spill slot indice must be >= 0"); - SS2IntervalMap::iterator I = S2IMap.find(Slot); - if (I == S2IMap.end()) { - I = S2IMap.emplace(std::piecewise_construct, std::forward_as_tuple(Slot), - std::forward_as_tuple( - TargetRegisterInfo::index2StackSlot(Slot), 0.0F)) - .first; - S2RCMap.insert(std::make_pair(Slot, RC)); - } else { - // Use the largest common subclass register class. - const TargetRegisterClass *OldRC = S2RCMap[Slot]; - S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); - } - return I->second; -} - -/// print - Implement the dump method. -void LiveStacks::print(raw_ostream &OS, const Module*) const { - - OS << "********** INTERVALS **********\n"; - for (const_iterator I = begin(), E = end(); I != E; ++I) { - I->second.print(OS); - int Slot = I->first; - const TargetRegisterClass *RC = getIntervalRegClass(Slot); - if (RC) - OS << " [" << TRI->getRegClassName(RC) << "]\n"; - else - OS << " [Unknown]\n"; - } -} |