summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/LiveRangeEdit.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-05-02 05:29:58 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-05-02 05:29:58 +0000
commit7d4067936a977c8c692884bfe131dd51406a0412 (patch)
tree09c24c0e88c64f1cf8ef661d8594ba76fb168419 /llvm/lib/CodeGen/LiveRangeEdit.cpp
parent55f1e202a88a4f54c3b5dd7fbb35c8d5ea071b3e (diff)
downloadbcm5719-llvm-7d4067936a977c8c692884bfe131dd51406a0412.tar.gz
bcm5719-llvm-7d4067936a977c8c692884bfe131dd51406a0412.zip
Minimize the slot indexes spanned by register ranges created when splitting.
When an interfering live range ends at a dead slot index between two instructions, make sure that the inserted copy instruction gets a slot index after the dead ones. This makes it possible to avoid the interference. Ideally, there shouldn't be interference ending at a deleted instruction, but physical register coalescing can sometimes do that to sub-registers. This fixes PR9823. llvm-svn: 130687
Diffstat (limited to 'llvm/lib/CodeGen/LiveRangeEdit.cpp')
-rw-r--r--llvm/lib/CodeGen/LiveRangeEdit.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/LiveRangeEdit.cpp b/llvm/lib/CodeGen/LiveRangeEdit.cpp
index 443cc2e9048..f8a3dbb5fd7 100644
--- a/llvm/lib/CodeGen/LiveRangeEdit.cpp
+++ b/llvm/lib/CodeGen/LiveRangeEdit.cpp
@@ -140,11 +140,13 @@ SlotIndex LiveRangeEdit::rematerializeAt(MachineBasicBlock &MBB,
const Remat &RM,
LiveIntervals &lis,
const TargetInstrInfo &tii,
- const TargetRegisterInfo &tri) {
+ const TargetRegisterInfo &tri,
+ bool Late) {
assert(RM.OrigMI && "Invalid remat");
tii.reMaterialize(MBB, MI, DestReg, 0, RM.OrigMI, tri);
rematted_.insert(RM.ParentVNI);
- return lis.InsertMachineInstrInMaps(--MI).getDefIndex();
+ return lis.getSlotIndexes()->insertMachineInstrInMaps(--MI, Late)
+ .getDefIndex();
}
void LiveRangeEdit::eraseVirtReg(unsigned Reg, LiveIntervals &LIS) {
OpenPOWER on IntegriCloud