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author | Matthias Braun <matze@braunis.de> | 2017-09-06 20:45:24 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2017-09-06 20:45:24 +0000 |
commit | c9056b834dd7343204228a93ad54b7e8dda70dab (patch) | |
tree | 4a1d309d43e68ddec515dac260af5b5a60b53ee6 /llvm/lib/CodeGen/LivePhysRegs.cpp | |
parent | d147f522525ac091a5e3235b2c26c47733fe9ed9 (diff) | |
download | bcm5719-llvm-c9056b834dd7343204228a93ad54b7e8dda70dab.tar.gz bcm5719-llvm-c9056b834dd7343204228a93ad54b7e8dda70dab.zip |
Insert IMPLICIT_DEFS for undef uses in tail merging
Tail merging can convert an undef use into a normal one when creating a
common tail. Doing so can make the register live out from a block which
previously contained the undef use. To keep the liveness up-to-date,
insert IMPLICIT_DEFs in such blocks when necessary.
To enable this patch the computeLiveIns() function which used to
compute live-ins for a block and set them immediately is split into new
functions:
- computeLiveIns() just computes the live-ins in a LivePhysRegs set.
- addLiveIns() applies the live-ins to a block live-in list.
- computeAndAddLiveIns() is a convenience function combining the other
two functions and behaving like computeLiveIns() before this patch.
Based on a patch by Krzysztof Parzyszek <kparzysz@codeaurora.org>
Differential Revision: https://reviews.llvm.org/D37034
llvm-svn: 312668
Diffstat (limited to 'llvm/lib/CodeGen/LivePhysRegs.cpp')
-rw-r--r-- | llvm/lib/CodeGen/LivePhysRegs.cpp | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp index 870d8cc71c7..ed05acfac4d 100644 --- a/llvm/lib/CodeGen/LivePhysRegs.cpp +++ b/llvm/lib/CodeGen/LivePhysRegs.cpp @@ -218,16 +218,22 @@ void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) { } void llvm::computeLiveIns(LivePhysRegs &LiveRegs, - const MachineRegisterInfo &MRI, - MachineBasicBlock &MBB) { + const MachineBasicBlock &MBB) { + const MachineFunction &MF = *MBB.getParent(); + const MachineRegisterInfo &MRI = MF.getRegInfo(); const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); - assert(MBB.livein_empty()); LiveRegs.init(TRI); LiveRegs.addLiveOutsNoPristines(MBB); - for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) + for (const MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) LiveRegs.stepBackward(MI); +} - for (unsigned Reg : LiveRegs) { +void llvm::addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs) { + assert(MBB.livein_empty() && "Expected empty live-in list"); + const MachineFunction &MF = *MBB.getParent(); + const MachineRegisterInfo &MRI = MF.getRegInfo(); + const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); + for (MCPhysReg Reg : LiveRegs) { if (MRI.isReserved(Reg)) continue; // Skip the register if we are about to add one of its super registers. @@ -243,3 +249,9 @@ void llvm::computeLiveIns(LivePhysRegs &LiveRegs, MBB.addLiveIn(Reg); } } + +void llvm::computeAndAddLiveIns(LivePhysRegs &LiveRegs, + MachineBasicBlock &MBB) { + computeLiveIns(LiveRegs, MBB); + addLiveIns(MBB, LiveRegs); +} |