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| author | Haicheng Wu <haicheng@codeaurora.org> | 2016-03-28 18:17:07 +0000 |
|---|---|---|
| committer | Haicheng Wu <haicheng@codeaurora.org> | 2016-03-28 18:17:07 +0000 |
| commit | 6a6bc750d5ba2a37438607e360346443268fe8bc (patch) | |
| tree | 6ac4ffbc6639b2fbd6ac9079d25c5ee3a2121f83 /llvm/lib/CodeGen/LivePhysRegs.cpp | |
| parent | ba85781f5846d156ff867340a203856aa1957dd6 (diff) | |
| download | bcm5719-llvm-6a6bc750d5ba2a37438607e360346443268fe8bc.tar.gz bcm5719-llvm-6a6bc750d5ba2a37438607e360346443268fe8bc.zip | |
[AArch64] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize
Mimic what x86 does when optimizing sdiv/udiv for minsize.
llvm-svn: 264606
Diffstat (limited to 'llvm/lib/CodeGen/LivePhysRegs.cpp')
0 files changed, 0 insertions, 0 deletions
