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authorMatthias Braun <matze@braunis.de>2016-05-03 00:08:46 +0000
committerMatthias Braun <matze@braunis.de>2016-05-03 00:08:46 +0000
commit24f26e6d91733d90ae24c8bbc95e052928b44bff (patch)
treeb642e96287223d7ee80594f5068c3a9e866a1136 /llvm/lib/CodeGen/LivePhysRegs.cpp
parent1a55a99362ac63b2a07d360dca07076c938a446d (diff)
downloadbcm5719-llvm-24f26e6d91733d90ae24c8bbc95e052928b44bff.tar.gz
bcm5719-llvm-24f26e6d91733d90ae24c8bbc95e052928b44bff.zip
LivePhysRegs: Automatically determine presence of pristine regs.
Remove the AddPristinesAndCSRs parameters from addLiveIns()/addLiveOuts(). We need to respect pristine registers after prologue epilogue insertion, Seeing that we got this wrong in at least two commits already, we should rather pay the small price to query MachineFrameInfo for it. There are three cases that did not set AddPristineAndCSRs to true even after register allocation: - ExecutionDepsFix: live-out registers are used as a hint that the register is used soon. This is not true for pristine registers so use the new addLiveOutsNoPristines() to maintain this behaviour. - SystemZShortenInst: Not setting AddPristineAndCSRs to true looks like a bug, should do the right thing automatically now. - StackMapLivenessAnalysis: Not adding pristine registers looks like a bug to me. Added a FIXME comment but maintain the current behaviour as a change may need to get coordinated with GC runtimes. llvm-svn: 268336
Diffstat (limited to 'llvm/lib/CodeGen/LivePhysRegs.cpp')
-rw-r--r--llvm/lib/CodeGen/LivePhysRegs.cpp36
1 files changed, 18 insertions, 18 deletions
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index 6cb3ee15a79..4945b3d216c 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -135,22 +135,25 @@ static void addLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB) {
/// Add pristine registers to the given \p LiveRegs. This function removes
/// actually saved callee save registers when \p InPrologueEpilogue is false.
static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF,
+ const MachineFrameInfo &MFI,
const TargetRegisterInfo &TRI) {
- const MachineFrameInfo &MFI = *MF.getFrameInfo();
- if (!MFI.isCalleeSavedInfoValid())
- return;
-
for (const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR)
LiveRegs.addReg(*CSR);
for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
LiveRegs.removeReg(Info.getReg());
}
-void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB,
- bool AddPristinesAndCSRs) {
- if (AddPristinesAndCSRs) {
- const MachineFunction &MF = *MBB->getParent();
- addPristines(*this, MF, *TRI);
+void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock *MBB) {
+ // To get the live-outs we simply merge the live-ins of all successors.
+ for (const MachineBasicBlock *Succ : MBB->successors())
+ ::addLiveIns(*this, *Succ);
+}
+
+void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB) {
+ const MachineFunction &MF = *MBB->getParent();
+ const MachineFrameInfo &MFI = *MF.getFrameInfo();
+ if (MFI.isCalleeSavedInfoValid()) {
+ addPristines(*this, MF, MFI, *TRI);
if (MBB->isReturnBlock()) {
// The return block has no successors whose live-ins we could merge
// below. So instead we add the callee saved registers manually.
@@ -159,16 +162,13 @@ void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB,
}
}
- // To get the live-outs we simply merge the live-ins of all successors.
- for (const MachineBasicBlock *Succ : MBB->successors())
- ::addLiveIns(*this, *Succ);
+ addLiveOutsNoPristines(MBB);
}
-void LivePhysRegs::addLiveIns(const MachineBasicBlock *MBB,
- bool AddPristines) {
- if (AddPristines) {
- const MachineFunction &MF = *MBB->getParent();
- addPristines(*this, MF, *TRI);
- }
+void LivePhysRegs::addLiveIns(const MachineBasicBlock *MBB) {
+ const MachineFunction &MF = *MBB->getParent();
+ const MachineFrameInfo &MFI = *MF.getFrameInfo();
+ if (MFI.isCalleeSavedInfoValid())
+ addPristines(*this, MF, MFI, *TRI);
::addLiveIns(*this, *MBB);
}
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