Added register reassignment prototype to RAGreedy. It's a simple

heuristic to reshuffle register assignments when we can't find an
available reg.

llvm-svn: 121388

1 files changed, 4 insertions, 1 deletions

diff --git a/llvm/lib/CodeGen/LiveIntervalUnion.cpp b/llvm/lib/CodeGen/LiveIntervalUnion.cpp
index 1fca034fdcb..d5c7bf08eb6 100644
--- a/llvm/lib/CodeGen/LiveIntervalUnion.cpp
+++ b/llvm/lib/CodeGen/LiveIntervalUnion.cpp
@@ -247,10 +247,13 @@ collectInterferingVRegs(unsigned MaxInterferingRegs) {
       if (!IR.LiveUnionI.value()->isSpillable())
         SeenUnspillableVReg = true;
 
-      InterferingVRegs.push_back(IR.LiveUnionI.value());
       if (InterferingVRegs.size() == MaxInterferingRegs)
+        // Leave SeenAllInterferences set to false to indicate that at least one
+        // interference exists beyond those we collected.
         return MaxInterferingRegs;
 
+      InterferingVRegs.push_back(IR.LiveUnionI.value());
+
       // Cache the most recent interfering vreg to bypass isSeenInterference.
       RecentInterferingVReg = IR.LiveUnionI.value();
       ++IR.LiveUnionI;