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authorCullen Rhodes <cullen.rhodes@arm.com>2019-05-20 10:35:23 +0000
committerCullen Rhodes <cullen.rhodes@arm.com>2019-05-20 10:35:23 +0000
commit96c5929926f62dcfa887f15d43094ed42df8b914 (patch)
treeeb2acb68f4c309b30b3e9535ef95b0fccf113024 /llvm/lib/CodeGen/LiveDebugValues.cpp
parent0fc6347b35841575e82e3c0ff7a762ce92758a60 (diff)
downloadbcm5719-llvm-96c5929926f62dcfa887f15d43094ed42df8b914.tar.gz
bcm5719-llvm-96c5929926f62dcfa887f15d43094ed42df8b914.zip
[AArch64][SVE2] Asm: add int halving add/sub (predicated) instructions
Summary: This patch adds support for the predicated integer halving add/sub instructions: * SHADD, UHADD, SRHADD, URHADD * SHSUB, UHSUB, SHSUBR, UHSUBR The specification can be found here: https://developer.arm.com/docs/ddi0602/latest Reviewed By: rovka Differential Revision: https://reviews.llvm.org/D62000 llvm-svn: 361136
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