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author | Duncan Sands <baldrick@free.fr> | 2008-12-13 07:18:38 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2008-12-13 07:18:38 +0000 |
commit | b6f09933c0417b2ad3ae66740da1c2e18f9bfa61 (patch) | |
tree | 0247a95785efaf7975d9c5af4097e6db63d05a0b /llvm/lib/CodeGen/LatencyPriorityQueue.cpp | |
parent | 234b44add21eff23678b74952fedc7905cfb76ee (diff) | |
download | bcm5719-llvm-b6f09933c0417b2ad3ae66740da1c2e18f9bfa61.tar.gz bcm5719-llvm-b6f09933c0417b2ad3ae66740da1c2e18f9bfa61.zip |
On big-endian machines it is wrong to do a full
width register load followed by a truncating
store for the copy, since the load will not place
the value in the lower bits. Probably partial
loads/stores can never happen here, but fix it
anyway.
llvm-svn: 60972
Diffstat (limited to 'llvm/lib/CodeGen/LatencyPriorityQueue.cpp')
0 files changed, 0 insertions, 0 deletions