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authorSam Parker <sam.parker@arm.com>2019-06-12 12:00:42 +0000
committerSam Parker <sam.parker@arm.com>2019-06-12 12:00:42 +0000
commit757ac02dc8fd04a1e337a9d08286877a382a6b53 (patch)
tree11f6ae6c24a193eae3affa584ca3d02c244845b6 /llvm/lib/CodeGen/LatencyPriorityQueue.cpp
parent91bb72a337a6e8dc68d56795ea6eff62b2593762 (diff)
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[ARM] Implement TTI::isHardwareLoopProfitable
Implement the backend target hook to drive the HardwareLoops pass. The low-overhead branch extension for Arm M-class cores is flexible enough that we don't have to ensure correctness at this point, except checking that the loop counter variable can be stored in LR - a 32-bit register. For it to be profitable, we want to avoid loops that contain function calls, or any other instruction that alters the PC. This implementation uses TargetLoweringInfo, to query type and operation actions, looks at intrinsic calls and also performs some manual checks for remainder/division and FP operations. I think this should be a good base to start and extra details can be filled out later. Differential Revision: https://reviews.llvm.org/D62907 llvm-svn: 363149
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