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authorChristopher Lamb <christopher.lamb@gmail.com>2007-07-26 08:18:32 +0000
committerChristopher Lamb <christopher.lamb@gmail.com>2007-07-26 08:18:32 +0000
commite9d738cefc414db00b589f981da0613fa656787b (patch)
tree400eae6dd24661863f3a952f55e42530e2d1afad /llvm/lib/CodeGen/LLVMTargetMachine.cpp
parent18603b03e1c7ff66a946da52de9b72bec20ca5b5 (diff)
downloadbcm5719-llvm-e9d738cefc414db00b589f981da0613fa656787b.tar.gz
bcm5719-llvm-e9d738cefc414db00b589f981da0613fa656787b.zip
Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
llvm-svn: 40521
Diffstat (limited to 'llvm/lib/CodeGen/LLVMTargetMachine.cpp')
-rw-r--r--llvm/lib/CodeGen/LLVMTargetMachine.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 218e79ac725..4620abb7211 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -96,6 +96,8 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+
+ PM.add(createLowerSubregsPass());
switch (FileType) {
default:
@@ -197,6 +199,8 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+
+ PM.add(createLowerSubregsPass());
addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
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