summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/LLVMTargetMachine.cpp
diff options
context:
space:
mode:
authorDale Johannesen <dalej@apple.com>2007-07-13 17:13:54 +0000
committerDale Johannesen <dalej@apple.com>2007-07-13 17:13:54 +0000
commit2182f06f2d839cfb3575a2004d066086829365c0 (patch)
treea8c33c8af491af6b1fcde76a885ec39074b6b393 /llvm/lib/CodeGen/LLVMTargetMachine.cpp
parentf9aba2c2b470fc0926eccc8fe6ae8c7a921908ff (diff)
downloadbcm5719-llvm-2182f06f2d839cfb3575a2004d066086829365c0.tar.gz
bcm5719-llvm-2182f06f2d839cfb3575a2004d066086829365c0.zip
Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to pre-RA-sched; adjust testcases. llvm-svn: 39816
Diffstat (limited to 'llvm/lib/CodeGen/LLVMTargetMachine.cpp')
-rw-r--r--llvm/lib/CodeGen/LLVMTargetMachine.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 4e3982df62a..b50b2753922 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -78,6 +78,9 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
+ // Second pass scheduler.
+ PM.add(createPostRAScheduler());
+
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
@@ -181,6 +184,9 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
if (PrintMachineCode) // Print the register-allocated code
PM.add(createMachineFunctionPrinterPass(cerr));
+ // Second pass scheduler.
+ PM.add(createPostRAScheduler());
+
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
OpenPOWER on IntegriCloud