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authorJames Y Knight <jyknight@google.com>2015-05-18 16:35:04 +0000
committerJames Y Knight <jyknight@google.com>2015-05-18 16:35:04 +0000
commit24060be73ac17046cdd05c384ed23aa346148f3c (patch)
treef87b278846bfada9c3ca517eda61b3cdf0562e48 /llvm/lib/CodeGen/InterferenceCache.h
parent807563df227b4d9961d60adf73c26e571615a815 (diff)
downloadbcm5719-llvm-24060be73ac17046cdd05c384ed23aa346148f3c.tar.gz
bcm5719-llvm-24060be73ac17046cdd05c384ed23aa346148f3c.zip
Sparc: Add the "alternate address space" load/store instructions.
- Adds support for the asm syntax, which has an immediate integer "ASI" (address space identifier) appearing after an address, before a comma. - Adds the various-width load, store, and swap in alternate address space instructions. (ldsba, ldsha, lduba, lduha, lda, stba, stha, sta, swapa) This does not attempt to hook these instructions up to pointer address spaces in LLVM, although that would probably be a reasonable thing to do in the future. Differential Revision: http://reviews.llvm.org/D8904 llvm-svn: 237581
Diffstat (limited to 'llvm/lib/CodeGen/InterferenceCache.h')
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