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| author | Chris Lattner <sabre@nondot.org> | 2002-10-28 04:45:29 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2002-10-28 04:45:29 +0000 |
| commit | 6a30b02b1dee4a104d6bc643a2b6c687192122b6 (patch) | |
| tree | 428f8d1ee78660bf901791990a0501520dc74f12 /llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp | |
| parent | 411837979a938de91c1549efd4c185435002317b (diff) | |
| download | bcm5719-llvm-6a30b02b1dee4a104d6bc643a2b6c687192122b6.tar.gz bcm5719-llvm-6a30b02b1dee4a104d6bc643a2b6c687192122b6.zip | |
Rename the redundant MachineOperand::getOperandType() to MachineOperand::getType()
llvm-svn: 4331
Diffstat (limited to 'llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp index 242d1dda5b3..796d076d6fa 100644 --- a/llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp +++ b/llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp @@ -483,9 +483,9 @@ FixConstantOperandsForInstr(Instruction* vmInstr, // Skip the result position, preallocated machine registers, or operands // that cannot be constants (CC regs or PC-relative displacements) if (instrDesc.resultPos == (int) op || - mop.getOperandType() == MachineOperand::MO_MachineRegister || - mop.getOperandType() == MachineOperand::MO_CCRegister || - mop.getOperandType() == MachineOperand::MO_PCRelativeDisp) + mop.getType() == MachineOperand::MO_MachineRegister || + mop.getType() == MachineOperand::MO_CCRegister || + mop.getType() == MachineOperand::MO_PCRelativeDisp) continue; bool constantThatMustBeLoaded = false; @@ -496,7 +496,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, MachineOperand::MO_VirtualRegister; // Operand may be a virtual register or a compile-time constant - if (mop.getOperandType() == MachineOperand::MO_VirtualRegister) + if (mop.getType() == MachineOperand::MO_VirtualRegister) { assert(mop.getVRegValue() != NULL); opValue = mop.getVRegValue(); @@ -510,10 +510,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr, } else { - assert(mop.getOperandType() == MachineOperand::MO_SignExtendedImmed || - mop.getOperandType() == MachineOperand::MO_UnextendedImmed); + assert(mop.getType() == MachineOperand::MO_SignExtendedImmed || + mop.getType() == MachineOperand::MO_UnextendedImmed); - bool isSigned = (mop.getOperandType() == + bool isSigned = (mop.getType() == MachineOperand::MO_SignExtendedImmed); // Bit-selection flags indicate an instruction that is extracting @@ -526,7 +526,7 @@ FixConstantOperandsForInstr(Instruction* vmInstr, opCode, target, (immedPos == (int)op), machineRegNum, immedValue); - if (opType == mop.getOperandType()) + if (opType == mop.getType()) continue; // no change: this is the most common case if (opType == MachineOperand::MO_VirtualRegister) |
