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authorChris Lattner <sabre@nondot.org>2002-02-03 07:29:45 +0000
committerChris Lattner <sabre@nondot.org>2002-02-03 07:29:45 +0000
commita17c469136700ce9c8adb81d40d755609c7cfa77 (patch)
tree349e1da3703317679c55a5851de28985a5401f0e /llvm/lib/CodeGen/InstrSched/SchedGraph.cpp
parent7c9c85947cdb0bf2cac1f71b571ad2abeff76157 (diff)
downloadbcm5719-llvm-a17c469136700ce9c8adb81d40d755609c7cfa77.tar.gz
bcm5719-llvm-a17c469136700ce9c8adb81d40d755609c7cfa77.zip
* Straighten out #includes
* Switch from MachineCodeForVMInstr to MachineCodeForInstruction model llvm-svn: 1644
Diffstat (limited to 'llvm/lib/CodeGen/InstrSched/SchedGraph.cpp')
-rw-r--r--llvm/lib/CodeGen/InstrSched/SchedGraph.cpp17
1 files changed, 7 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/InstrSched/SchedGraph.cpp b/llvm/lib/CodeGen/InstrSched/SchedGraph.cpp
index 7c83e1a58c8..890a911c488 100644
--- a/llvm/lib/CodeGen/InstrSched/SchedGraph.cpp
+++ b/llvm/lib/CodeGen/InstrSched/SchedGraph.cpp
@@ -13,21 +13,18 @@
//**************************************************************************/
#include "SchedGraph.h"
-#include "llvm/InstrTypes.h"
-#include "llvm/Instruction.h"
-#include "llvm/BasicBlock.h"
-#include "llvm/Method.h"
-#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/InstrSelection.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/Target/MachineInstrInfo.h"
#include "llvm/Target/MachineRegInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/BasicBlock.h"
+#include "llvm/Method.h"
#include "llvm/iOther.h"
#include "Support/StringExtras.h"
#include "Support/STLExtras.h"
-#include <algorithm>
-#include <vector>
#include <iostream>
-#include <ext/hash_map>
using std::vector;
using std::pair;
@@ -353,12 +350,12 @@ SchedGraph::addCDEdges(const TerminatorInst* term,
const TargetMachine& target)
{
const MachineInstrInfo& mii = target.getInstrInfo();
- MachineCodeForVMInstr& termMvec = term->getMachineInstrVec();
+ MachineCodeForInstruction &termMvec = MachineCodeForInstruction::get(term);
// Find the first branch instr in the sequence of machine instrs for term
//
unsigned first = 0;
- while (! mii.isBranch(termMvec[first]->getOpCode()))
+ while (!mii.isBranch(termMvec[first]->getOpCode()))
++first;
assert(first < termMvec.size() &&
"No branch instructions for BR? Ok, but weird! Delete assertion.");
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