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authorChris Lattner <sabre@nondot.org>2002-02-03 07:28:30 +0000
committerChris Lattner <sabre@nondot.org>2002-02-03 07:28:30 +0000
commit7c9c85947cdb0bf2cac1f71b571ad2abeff76157 (patch)
tree411d87a670063ada4ad78505f40809e162ae648d /llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
parent6f27b7d41cdc62a98cdc6a4b3bffdf5bb2083963 (diff)
downloadbcm5719-llvm-7c9c85947cdb0bf2cac1f71b571ad2abeff76157.tar.gz
bcm5719-llvm-7c9c85947cdb0bf2cac1f71b571ad2abeff76157.zip
* Get machine instrs from Instructin's by using MachineCodeForInstruction::get
* Convert a few (*X). to X-> llvm-svn: 1643
Diffstat (limited to 'llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp')
-rw-r--r--llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp20
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
index ea41b6f8222..292c2c55e1c 100644
--- a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -10,17 +10,17 @@
//**************************************************************************/
-//************************* User Include Files *****************************/
-
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/Analysis/LiveVar/BBLiveVar.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Instruction.h"
+#include "llvm/CodeGen/MachineCodeForInstruction.h"
+#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/Target/TargetMachine.h"
#include "Support/CommandLine.h"
#include "SchedPriorities.h"
+#include <ext/hash_set>
#include <algorithm>
#include <iterator>
-#include <ext/hash_set>
#include <iostream>
using std::cerr;
using std::vector;
@@ -1284,12 +1284,12 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S,
//
static void
ChooseInstructionsForDelaySlots(SchedulingManager& S,
- const BasicBlock* bb,
- SchedGraph* graph)
+ const BasicBlock *bb,
+ SchedGraph *graph)
{
const MachineInstrInfo& mii = S.getInstrInfo();
- const TerminatorInst* termInstr = bb->getTerminator();
- MachineCodeForVMInstr& termMvec = termInstr->getMachineInstrVec();
+ const TerminatorInst *termInstr = bb->getTerminator();
+ MachineCodeForInstruction &termMvec=MachineCodeForInstruction::get(termInstr);
vector<SchedGraphNode*> delayNodeVec;
const MachineInstr* brInstr = NULL;
@@ -1507,7 +1507,7 @@ ScheduleInstructionsWithSSA(Method* method,
for (SchedGraphSet::const_iterator GI=graphSet.begin();
GI != graphSet.end(); ++GI)
{
- SchedGraph* graph = (*GI).second;
+ SchedGraph* graph = GI->second;
const vector<const BasicBlock*>& bbvec = graph->getBasicBlocks();
assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks");
const BasicBlock* bb = bbvec[0];
@@ -1522,7 +1522,7 @@ ScheduleInstructionsWithSSA(Method* method,
ForwardListSchedule(S); // computes schedule in S
- RecordSchedule((*GI).first, S); // records schedule in BB
+ RecordSchedule(GI->first, S); // records schedule in BB
}
if (SchedDebugLevel >= Sched_PrintMachineCode)
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