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authorBjorn Pettersson <bjorn.a.pettersson@ericsson.com>2019-04-19 09:08:38 +0000
committerBjorn Pettersson <bjorn.a.pettersson@ericsson.com>2019-04-19 09:08:38 +0000
commit238c9d6308df84473aecbc993cd09a53c057fe0f (patch)
tree6812d1185ff3952104ee80eb11929ed4f271066f /llvm/lib/CodeGen/ImplicitNullChecks.cpp
parent9ad4cb3de47e3520adb4caf1dcadd33b72038493 (diff)
downloadbcm5719-llvm-238c9d6308df84473aecbc993cd09a53c057fe0f.tar.gz
bcm5719-llvm-238c9d6308df84473aecbc993cd09a53c057fe0f.zip
[CodeGen] Add "const" to MachineInstr::mayAlias
Summary: The basic idea here is to make it possible to use MachineInstr::mayAlias also when the MachineInstr is const (or the "Other" MachineInstr is const). The addition of const in MachineInstr::mayAlias then rippled down to the need for adding const in several other places, such as TargetTransformInfo::getMemOperandWithOffset. Reviewers: hfinkel Reviewed By: hfinkel Subscribers: hfinkel, MatzeB, arsenm, jvesely, nhaehnle, hiraditya, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60856 llvm-svn: 358744
Diffstat (limited to 'llvm/lib/CodeGen/ImplicitNullChecks.cpp')
-rw-r--r--llvm/lib/CodeGen/ImplicitNullChecks.cpp15
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/ImplicitNullChecks.cpp b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
index 68110314151..dff6d02b06e 100644
--- a/llvm/lib/CodeGen/ImplicitNullChecks.cpp
+++ b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
@@ -180,7 +180,8 @@ class ImplicitNullChecks : public MachineFunctionPass {
/// Returns AR_NoAlias if \p MI memory operation does not alias with
/// \p PrevMI, AR_MayAlias if they may alias and AR_WillAliasEverything if
/// they may alias and any further memory operation may alias with \p PrevMI.
- AliasResult areMemoryOpsAliased(MachineInstr &MI, MachineInstr *PrevMI);
+ AliasResult areMemoryOpsAliased(const MachineInstr &MI,
+ const MachineInstr *PrevMI) const;
enum SuitabilityResult {
SR_Suitable,
@@ -194,7 +195,8 @@ class ImplicitNullChecks : public MachineFunctionPass {
/// no sense to continue lookup due to any other instruction will not be able
/// to be used. \p PrevInsts is the set of instruction seen since
/// the explicit null check on \p PointerReg.
- SuitabilityResult isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
+ SuitabilityResult isSuitableMemoryOp(const MachineInstr &MI,
+ unsigned PointerReg,
ArrayRef<MachineInstr *> PrevInsts);
/// Return true if \p FaultingMI can be hoisted from after the
@@ -318,8 +320,8 @@ static bool AnyAliasLiveIn(const TargetRegisterInfo *TRI,
}
ImplicitNullChecks::AliasResult
-ImplicitNullChecks::areMemoryOpsAliased(MachineInstr &MI,
- MachineInstr *PrevMI) {
+ImplicitNullChecks::areMemoryOpsAliased(const MachineInstr &MI,
+ const MachineInstr *PrevMI) const {
// If it is not memory access, skip the check.
if (!(PrevMI->mayStore() || PrevMI->mayLoad()))
return AR_NoAlias;
@@ -356,10 +358,11 @@ ImplicitNullChecks::areMemoryOpsAliased(MachineInstr &MI,
}
ImplicitNullChecks::SuitabilityResult
-ImplicitNullChecks::isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
+ImplicitNullChecks::isSuitableMemoryOp(const MachineInstr &MI,
+ unsigned PointerReg,
ArrayRef<MachineInstr *> PrevInsts) {
int64_t Offset;
- MachineOperand *BaseOp;
+ const MachineOperand *BaseOp;
if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, TRI) ||
!BaseOp->isReg() || BaseOp->getReg() != PointerReg)
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