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author | Hiroshi Yamauchi <yamauchi@google.com> | 2019-12-05 09:39:37 -0800 |
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committer | Hiroshi Yamauchi <yamauchi@google.com> | 2019-12-09 12:42:59 -0800 |
commit | d9ae493937c7fff67cb0afba133c6f9872db784a (patch) | |
tree | e2ed33de6c22380c0bf59e515300322c4fa30a1f /llvm/lib/CodeGen/IfConversion.cpp | |
parent | 505aa2410db6d089279da1a271903ce2633764f6 (diff) | |
download | bcm5719-llvm-d9ae493937c7fff67cb0afba133c6f9872db784a.tar.gz bcm5719-llvm-d9ae493937c7fff67cb0afba133c6f9872db784a.zip |
[PGO][PGSO] Instrument the code gen / target passes.
Summary:
Split off of D67120.
Add the profile guided size optimization instrumentation / queries in the code
gen or target passes. This doesn't enable the size optimizations in those passes
yet as they are currently disabled in shouldOptimizeForSize (for non-IR pass
queries).
A second try after reverted D71072.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71149
Diffstat (limited to 'llvm/lib/CodeGen/IfConversion.cpp')
-rw-r--r-- | llvm/lib/CodeGen/IfConversion.cpp | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp index 14485a2142a..7d64828aa48 100644 --- a/llvm/lib/CodeGen/IfConversion.cpp +++ b/llvm/lib/CodeGen/IfConversion.cpp @@ -19,6 +19,7 @@ #include "llvm/ADT/SparseSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/iterator_range.h" +#include "llvm/Analysis/ProfileSummaryInfo.h" #include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" @@ -213,6 +214,7 @@ namespace { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired<MachineBlockFrequencyInfo>(); AU.addRequired<MachineBranchProbabilityInfo>(); + AU.addRequired<ProfileSummaryInfoWrapperPass>(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -434,6 +436,7 @@ char &llvm::IfConverterID = IfConverter::ID; INITIALIZE_PASS_BEGIN(IfConverter, DEBUG_TYPE, "If Converter", false, false) INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo) +INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass) INITIALIZE_PASS_END(IfConverter, DEBUG_TYPE, "If Converter", false, false) bool IfConverter::runOnMachineFunction(MachineFunction &MF) { @@ -446,6 +449,8 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) { TRI = ST.getRegisterInfo(); BranchFolder::MBFIWrapper MBFI(getAnalysis<MachineBlockFrequencyInfo>()); MBPI = &getAnalysis<MachineBranchProbabilityInfo>(); + ProfileSummaryInfo *PSI = + &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI(); MRI = &MF.getRegInfo(); SchedModel.init(&ST); @@ -456,7 +461,7 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) { bool BFChange = false; if (!PreRegAlloc) { // Tail merge tend to expose more if-conversion opportunities. - BranchFolder BF(true, false, MBFI, *MBPI); + BranchFolder BF(true, false, MBFI, *MBPI, PSI); auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>(); BFChange = BF.OptimizeFunction( MF, TII, ST.getRegisterInfo(), @@ -598,7 +603,7 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) { BBAnalysis.clear(); if (MadeChange && IfCvtBranchFold) { - BranchFolder BF(false, false, MBFI, *MBPI); + BranchFolder BF(false, false, MBFI, *MBPI, PSI); auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>(); BF.OptimizeFunction( MF, TII, MF.getSubtarget().getRegisterInfo(), |