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author | Amara Emerson <aemerson@apple.com> | 2019-03-18 19:20:10 +0000 |
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committer | Amara Emerson <aemerson@apple.com> | 2019-03-18 19:20:10 +0000 |
commit | 8627178d4680af6a49459659a71f690dfefc2783 (patch) | |
tree | 3ab6489094d685840db8051569b23d15a38c84b9 /llvm/lib/CodeGen/GlobalISel | |
parent | 4aeea4cc42323067f0fb73fd844a66fbb295f889 (diff) | |
download | bcm5719-llvm-8627178d4680af6a49459659a71f690dfefc2783.tar.gz bcm5719-llvm-8627178d4680af6a49459659a71f690dfefc2783.zip |
Revert r356304: remove subreg parameter from MachineIRBuilder::buildCopy()
After review comments, it was preferred to not teach MachineIRBuilder about
non-generic instructions beyond using buildInstr().
For AArch64 I've changed the buildCopy() calls to buildInstr() + a
separate addReg() call.
This also relaxes the MachineIRBuilder's COPY checking more because it may
not always have a SrcOp given to it.
llvm-svn: 356396
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp index 6f95c03c899..81d26e6addb 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp @@ -242,11 +242,8 @@ MachineInstrBuilder MachineIRBuilder::buildBrIndirect(unsigned Tgt) { } MachineInstrBuilder MachineIRBuilder::buildCopy(const DstOp &Res, - const SrcOp &Op, - unsigned Subreg) { - auto Copy = buildInstr(TargetOpcode::COPY, Res, Op); - Copy->getOperand(1).setSubReg(Subreg); - return Copy; + const SrcOp &Op) { + return buildInstr(TargetOpcode::COPY, Res, Op); } MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res, @@ -916,6 +913,9 @@ MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc, case TargetOpcode::COPY: assert(DstOps.size() == 1 && "Invalid Dst"); assert(SrcOps.size() == 1 && "Invalid Srcs"); + assert(DstOps[0].getLLTTy(*getMRI()) == LLT() || + SrcOps[0].getLLTTy(*getMRI()) == LLT() || + DstOps[0].getLLTTy(*getMRI()) == SrcOps[0].getLLTTy(*getMRI())); break; case TargetOpcode::G_FCMP: case TargetOpcode::G_ICMP: { |