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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-09-16 14:44:51 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-09-16 14:44:51 +0000 |
| commit | 7306313e6d6db1cb494bd82d2cf5537edd450c35 (patch) | |
| tree | a892aebe4c253a4030c561a805ed82e5804e3255 /llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | |
| parent | 02629aae3be67cd3ff72fcb5d945e0915723353a (diff) | |
| download | bcm5719-llvm-7306313e6d6db1cb494bd82d2cf5537edd450c35.tar.gz bcm5719-llvm-7306313e6d6db1cb494bd82d2cf5537edd450c35.zip | |
[AArch64][GlobalISel] Add default regbank mappings for mixed-type ops.
We used to only support instructions with same-type operands.
Instead, use the per-register type information to map each
operand more accurately.
llvm-svn: 281734
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp')
0 files changed, 0 insertions, 0 deletions
