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authorQuentin Colombet <qcolombet@apple.com>2016-05-20 16:55:35 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-05-20 16:55:35 +0000
commit46df722eb0101753667334749a2730bd040792e2 (patch)
treef42abdd419782afadc1fead6731d89c29f5fd910 /llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
parent8bc63b2f47a5a2a9a75962f6bbd62fcc85005675 (diff)
downloadbcm5719-llvm-46df722eb0101753667334749a2730bd040792e2.tar.gz
bcm5719-llvm-46df722eb0101753667334749a2730bd040792e2.zip
[RegBankSelect] Specify different optimization mode for the pass.
The mode should be choose by the target when instantiating the pass. llvm-svn: 270235
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp')
-rw-r--r--llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index 6a2fd335b3b..9586223ac13 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -29,8 +29,9 @@ INITIALIZE_PASS(RegBankSelect, "regbankselect",
"Assign register bank of generic virtual registers",
false, false);
-RegBankSelect::RegBankSelect()
- : MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr) {
+RegBankSelect::RegBankSelect(Mode RunningMode)
+ : MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr),
+ OptMode(RunningMode) {
initializeRegBankSelectPass(*PassRegistry::getPassRegistry());
}
@@ -39,6 +40,7 @@ void RegBankSelect::init(MachineFunction &MF) {
assert(RBI && "Cannot work without RegisterBankInfo");
MRI = &MF.getRegInfo();
TRI = MF.getSubtarget().getRegisterInfo();
+ assert(OptMode == Mode::Fast && "Non-fast mode not implemented");
MIRBuilder.setMF(MF);
}
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