diff options
author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 11:41:16 +0000 |
---|---|---|
committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 11:41:16 +0000 |
commit | 45eb3b94d4e1327a9538fdb9536abc6659626928 (patch) | |
tree | 8606f2d9632d43cbf202b884140e193e953302c0 /llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | |
parent | faf8e9f8c65a4ad8577189688dd373f124f7052f (diff) | |
download | bcm5719-llvm-45eb3b94d4e1327a9538fdb9536abc6659626928.tar.gz bcm5719-llvm-45eb3b94d4e1327a9538fdb9536abc6659626928.zip |
[GlobalISel] Don't RegBankSelect target-specific instructions.
They don't have types and should be using register classes.
llvm-svn: 277447
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp index 521bb795682..6248ab46097 100644 --- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp +++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp @@ -554,7 +554,13 @@ bool RegBankSelect::runOnMachineFunction(MachineFunction &MF) { MII != End;) { // MI might be invalidated by the assignment, so move the // iterator before hand. - assignInstr(*MII++); + MachineInstr &MI = *MII++; + + // Ignore target-specific instructions: they should use proper regclasses. + if (isTargetSpecificOpcode(MI.getOpcode())) + continue; + + assignInstr(MI); } } OptMode = SaveOptMode; |