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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-05-18 10:33:36 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-05-18 10:33:36 +0000 |
| commit | 89e9308623ff0f03fa2fc5416d6f4c9c8645707d (patch) | |
| tree | 18a31c798b3cbbc9acf359d522f289cf24cc7aeb /llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp | |
| parent | d17d13d2a960ef7e0c8568538365c730327f1f14 (diff) | |
| download | bcm5719-llvm-89e9308623ff0f03fa2fc5416d6f4c9c8645707d.tar.gz bcm5719-llvm-89e9308623ff0f03fa2fc5416d6f4c9c8645707d.zip | |
Re-commit: [globalisel][tablegen] Import rules containing intrinsic_wo_chain.
Summary:
As of this patch, 1018 out of 3938 rules are currently imported.
Depends on D32275
Reviewers: qcolombet, kristof.beyls, rovka, t.p.northover, ab, aditya_nandakumar
Reviewed By: qcolombet
Subscribers: dberris, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D32278
The previous commit failed on test-suite/Bitcode/simd_ops/AArch64_halide_runtime.bc
because isImmOperandEqual() assumed MO was a register operand and that's not
always true.
llvm-svn: 303341
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp index c67da8629a3..4c0b06dffd2 100644 --- a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp +++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp @@ -73,7 +73,7 @@ bool InstructionSelector::isOperandImmEqual( const MachineOperand &MO, int64_t Value, const MachineRegisterInfo &MRI) const { - if (MO.getReg()) + if (MO.isReg() && MO.getReg()) if (auto VRegVal = getConstantVRegVal(MO.getReg(), MRI)) return *VRegVal == Value; return false; |
