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author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-10-16 01:16:35 +0000 |
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committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-10-16 01:16:35 +0000 |
commit | 6735ea86cd5dd2b3abbce44a7542c40a588419f4 (patch) | |
tree | 42bb0bcfdce6da955d633e63a91aa829da255590 /llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp | |
parent | a71f45476563d0c12cd97bee86836372b05bda73 (diff) | |
download | bcm5719-llvm-6735ea86cd5dd2b3abbce44a7542c40a588419f4.tar.gz bcm5719-llvm-6735ea86cd5dd2b3abbce44a7542c40a588419f4.zip |
[globalisel][tblgen] Add support for iPTR and implement am_unscaled* and am_indexed*
Summary:
iPTR is a pointer of subtarget-specific size to any address space. Therefore
type checks on this size derive the SizeInBits from a subtarget hook.
At this point, we can import the simplests G_LOAD rules and select load
instructions using them. Further patches will support for the predicates to
enable additional loads as well as the stores.
Depends on D37457
Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar
Reviewed By: qcolombet
Subscribers: kristof.beyls, javed.absar, llvm-commits, igorb
Differential Revision: https://reviews.llvm.org/D37458
llvm-svn: 315885
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp index e4ee2bb7cf4..2a563c9bf5c 100644 --- a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp +++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp @@ -18,6 +18,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/MC/MCInstrDesc.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" @@ -98,6 +99,23 @@ bool InstructionSelector::isOperandImmEqual( return false; } +bool InstructionSelector::isBaseWithConstantOffset( + const MachineOperand &Root, const MachineRegisterInfo &MRI) const { + if (!Root.isReg()) + return false; + + MachineInstr *RootI = MRI.getVRegDef(Root.getReg()); + if (RootI->getOpcode() != TargetOpcode::G_GEP) + return false; + + MachineOperand &RHS = RootI->getOperand(2); + MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg()); + if (RHSI->getOpcode() != TargetOpcode::G_CONSTANT) + return false; + + return true; +} + bool InstructionSelector::isObviouslySafeToFold(MachineInstr &MI) const { return !MI.mayLoadOrStore() && !MI.hasUnmodeledSideEffects() && MI.implicit_operands().begin() == MI.implicit_operands().end(); |