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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 15:10:28 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 15:10:28 +0000 |
| commit | ad30db32e68bfd54f4185b5dd676be76444e64bd (patch) | |
| tree | aa7e1afedd29177bc8d2607640a7f37920768b74 /llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | |
| parent | 0d7b0cb865514a04cf18a220c80d6d0301f339ee (diff) | |
| download | bcm5719-llvm-ad30db32e68bfd54f4185b5dd676be76444e64bd.tar.gz bcm5719-llvm-ad30db32e68bfd54f4185b5dd676be76444e64bd.zip | |
[AArch64][GlobalISel] Mark basic binops/memops as legal.
We currently use and test these, and select most of them. Mark them
as legal even though we don't go through the full ir->asm flow yet.
This doesn't currently have standalone tests, but the verifier will
soon learn to check that the regbankselect/select tests are legal.
llvm-svn: 277471
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp')
0 files changed, 0 insertions, 0 deletions
