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| author | Tim Northover <tnorthover@apple.com> | 2016-09-01 20:45:41 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-09-01 20:45:41 +0000 |
| commit | 8d8812c5d7e546b40e0549fd3d82f74c7f6d4ba5 (patch) | |
| tree | 1dc7afdc4727c92305b1d874892b96e545d684e5 /llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | |
| parent | bc555b7ebe054eb5fde6548b299a622fad66de34 (diff) | |
| download | bcm5719-llvm-8d8812c5d7e546b40e0549fd3d82f74c7f6d4ba5.tar.gz bcm5719-llvm-8d8812c5d7e546b40e0549fd3d82f74c7f6d4ba5.zip | |
GlobalISel: add a G_PHI instruction to give phis a type.
They're another source of generic vregs, which are going to need a type on the
definition when we remove the register width from MachineRegisterInfo.
llvm-svn: 280412
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index a27d53941a4..f0ac16712a5 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -405,7 +405,7 @@ bool IRTranslator::translateStaticAlloca(const AllocaInst &AI) { bool IRTranslator::translatePHI(const User &U) { const PHINode &PI = cast<PHINode>(U); - MachineInstrBuilder MIB = MIRBuilder.buildInstr(TargetOpcode::PHI); + auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_PHI, LLT{*U.getType()}); MIB.addDef(getOrCreateVReg(PI)); PendingPHIs.emplace_back(&PI, MIB.getInstr()); |
