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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-08-29 17:24:36 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-08-29 17:24:36 +0000
commitb2b9a2375848d37f6104ce01bd34bf2a3ddc9d2e (patch)
tree9d3a3fa385ed7ee064dd32cd75524b45388da027 /llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
parentcaff0a88dd21e045712d843a3d3c90ea12944e96 (diff)
downloadbcm5719-llvm-b2b9a2375848d37f6104ce01bd34bf2a3ddc9d2e.tar.gz
bcm5719-llvm-b2b9a2375848d37f6104ce01bd34bf2a3ddc9d2e.zip
GlobalISel: Add maskedValueIsZero and signBitIsZero to known bits
I dropped the DemandedElts since it seems to be missing from some of the new interfaces, but not others. llvm-svn: 370389
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp')
-rw-r--r--llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index 31e28f5ed5c..0870aa3812f 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -75,6 +75,12 @@ KnownBits GISelKnownBits::getKnownBits(Register R) {
return Known;
}
+bool GISelKnownBits::signBitIsZero(Register R) {
+ LLT Ty = MRI.getType(R);
+ unsigned BitWidth = Ty.getScalarSizeInBits();
+ return maskedValueIsZero(R, APInt::getSignMask(BitWidth));
+}
+
APInt GISelKnownBits::getKnownZeroes(Register R) {
return getKnownBits(R).Zero;
}
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