summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
diff options
context:
space:
mode:
authorSean Silva <silvas@purdue.edu>2012-09-19 02:14:59 +0000
committerSean Silva <silvas@purdue.edu>2012-09-19 02:14:59 +0000
commit8f43c6f0d57b9b79699086a4c2e38dc0f89aaa40 (patch)
treebd8194de448d335b1e499db621e15ceb04dd33f5 /llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
parentaa4d45314cccf502f7de534623dd42706097abb7 (diff)
downloadbcm5719-llvm-8f43c6f0d57b9b79699086a4c2e38dc0f89aaa40.tar.gz
bcm5719-llvm-8f43c6f0d57b9b79699086a4c2e38dc0f89aaa40.zip
De-nest if's and fix mix-up
Two deeply nested if's obscured that the sense of the conditions was mixed up. Amazingly, TableGen's output is exactly the same even with the sense of the tests fixed; it seems that all of TableGen's conversions are symmetric so that the inverted sense was nonetheless correct "by accident". As such, I couldn't come up with a test case. If there does in fact exist a non-symmetric conversion in TableGen's type system, then a test case should be prepared. Despite the symmetry, both if's are left in place for robustness in the face of future changes. Review by Jakob. llvm-svn: 164195
Diffstat (limited to 'llvm/lib/CodeGen/DeadMachineInstructionElim.cpp')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud