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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-01-14 21:17:04 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-01-14 21:17:04 +0000 |
commit | c005e20d3b358c0ee4a8f75e8e63d515def82d6b (patch) | |
tree | ab048b5ecfe1c088d61691990bda0400f0520084 /llvm/lib/CodeGen/DFAPacketizer.cpp | |
parent | da00f2fdf4d1d4db75591bdb9a4ac79ce1a2cc38 (diff) | |
download | bcm5719-llvm-c005e20d3b358c0ee4a8f75e8e63d515def82d6b.tar.gz bcm5719-llvm-c005e20d3b358c0ee4a8f75e8e63d515def82d6b.zip |
[Packetizer] Code cleanup, NFC
llvm-svn: 257805
Diffstat (limited to 'llvm/lib/CodeGen/DFAPacketizer.cpp')
-rw-r--r-- | llvm/lib/CodeGen/DFAPacketizer.cpp | 109 |
1 files changed, 54 insertions, 55 deletions
diff --git a/llvm/lib/CodeGen/DFAPacketizer.cpp b/llvm/lib/CodeGen/DFAPacketizer.cpp index af6b6a392b7..c8a3d381242 100644 --- a/llvm/lib/CodeGen/DFAPacketizer.cpp +++ b/llvm/lib/CodeGen/DFAPacketizer.cpp @@ -29,6 +29,7 @@ #include "llvm/CodeGen/ScheduleDAGInstrs.h" #include "llvm/MC/MCInstrItineraries.h" #include "llvm/Target/TargetInstrInfo.h" + using namespace llvm; // -------------------------------------------------------------------- @@ -44,8 +45,8 @@ namespace { /// DFAPacketizerEmitter.cpp. DFAInput getDFAInsnInput(const std::vector<unsigned> &InsnClass) { DFAInput InsnInput = 0; - assert ((InsnClass.size() <= DFA_MAX_RESTERMS) && - "Exceeded maximum number of DFA terms"); + assert((InsnClass.size() <= DFA_MAX_RESTERMS) && + "Exceeded maximum number of DFA terms"); for (auto U : InsnClass) InsnInput = addDFAFuncUnits(InsnInput, U); return InsnInput; @@ -66,8 +67,7 @@ DFAPacketizer::DFAPacketizer(const InstrItineraryData *I, } -// -// ReadTable - Read the DFA transition table and update CachedTable. +// Read the DFA transition table and update CachedTable. // // Format of the transition tables: // DFAStateInputTable[][2] = pairs of <Input, Transition> for all valid @@ -80,8 +80,7 @@ void DFAPacketizer::ReadTable(unsigned int state) { unsigned NextStateInTable = DFAStateEntryTable[state+1]; // Early exit in case CachedTable has already contains this // state's transitions. - if (CachedTable.count(UnsignPair(state, - DFAStateInputTable[ThisState][0]))) + if (CachedTable.count(UnsignPair(state, DFAStateInputTable[ThisState][0]))) return; for (unsigned i = ThisState; i < NextStateInTable; i++) @@ -89,38 +88,41 @@ void DFAPacketizer::ReadTable(unsigned int state) { DFAStateInputTable[i][1]; } -// -// getInsnInput - Return the DFAInput for an instruction class. -// + +// Return the DFAInput for an instruction class. DFAInput DFAPacketizer::getInsnInput(unsigned InsnClass) { // Note: this logic must match that in DFAPacketizerDefs.h for input vectors. DFAInput InsnInput = 0; unsigned i = 0; + (void)i; for (const InstrStage *IS = InstrItins->beginStage(InsnClass), - *IE = InstrItins->endStage(InsnClass); IS != IE; ++IS, ++i) { + *IE = InstrItins->endStage(InsnClass); IS != IE; ++IS) { InsnInput = addDFAFuncUnits(InsnInput, IS->getUnits()); - assert ((i < DFA_MAX_RESTERMS) && "Exceeded maximum number of DFA inputs"); + assert((i++ < DFA_MAX_RESTERMS) && "Exceeded maximum number of DFA inputs"); } return InsnInput; } -// getInsnInput - Return the DFAInput for an instruction class input vector. + +// Return the DFAInput for an instruction class input vector. DFAInput DFAPacketizer::getInsnInput(const std::vector<unsigned> &InsnClass) { return getDFAInsnInput(InsnClass); } -// canReserveResources - Check if the resources occupied by a MCInstrDesc -// are available in the current state. + +// Check if the resources occupied by a MCInstrDesc are available in the +// current state. bool DFAPacketizer::canReserveResources(const llvm::MCInstrDesc *MID) { unsigned InsnClass = MID->getSchedClass(); DFAInput InsnInput = getInsnInput(InsnClass); UnsignPair StateTrans = UnsignPair(CurrentState, InsnInput); ReadTable(CurrentState); - return (CachedTable.count(StateTrans) != 0); + return CachedTable.count(StateTrans) != 0; } -// reserveResources - Reserve the resources occupied by a MCInstrDesc and -// change the current state to reflect that change. + +// Reserve the resources occupied by a MCInstrDesc and change the current +// state to reflect that change. void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) { unsigned InsnClass = MID->getSchedClass(); DFAInput InsnInput = getInsnInput(InsnClass); @@ -131,34 +133,37 @@ void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) { } -// canReserveResources - Check if the resources occupied by a machine -// instruction are available in the current state. +// Check if the resources occupied by a machine instruction are available +// in the current state. bool DFAPacketizer::canReserveResources(llvm::MachineInstr *MI) { const llvm::MCInstrDesc &MID = MI->getDesc(); return canReserveResources(&MID); } -// reserveResources - Reserve the resources occupied by a machine -// instruction and change the current state to reflect that change. + +// Reserve the resources occupied by a machine instruction and change the +// current state to reflect that change. void DFAPacketizer::reserveResources(llvm::MachineInstr *MI) { const llvm::MCInstrDesc &MID = MI->getDesc(); reserveResources(&MID); } + namespace llvm { -// DefaultVLIWScheduler - This class extends ScheduleDAGInstrs and overrides -// Schedule method to build the dependence graph. +// This class extends ScheduleDAGInstrs and overrides the schedule method +// to build the dependence graph. class DefaultVLIWScheduler : public ScheduleDAGInstrs { private: AliasAnalysis *AA; public: DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI, AliasAnalysis *AA); - // Schedule - Actual scheduling work. + // Actual scheduling work. void schedule() override; }; } + DefaultVLIWScheduler::DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI, AliasAnalysis *AA) @@ -166,33 +171,31 @@ DefaultVLIWScheduler::DefaultVLIWScheduler(MachineFunction &MF, CanHandleTerminators = true; } + void DefaultVLIWScheduler::schedule() { // Build the scheduling graph. buildSchedGraph(AA); } -// VLIWPacketizerList Ctor -VLIWPacketizerList::VLIWPacketizerList(MachineFunction &MF, - MachineLoopInfo &MLI, AliasAnalysis *AA) - : MF(MF), AA(AA) { - TII = MF.getSubtarget().getInstrInfo(); + +VLIWPacketizerList::VLIWPacketizerList(MachineFunction &mf, + MachineLoopInfo &mli, AliasAnalysis *aa) + : MF(mf), TII(mf.getSubtarget().getInstrInfo()), AA(aa) { ResourceTracker = TII->CreateTargetScheduleState(MF.getSubtarget()); - VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, AA); + VLIWScheduler = new DefaultVLIWScheduler(MF, mli, AA); } -// VLIWPacketizerList Dtor + VLIWPacketizerList::~VLIWPacketizerList() { if (VLIWScheduler) delete VLIWScheduler; - if (ResourceTracker) delete ResourceTracker; } -// endPacket - End the current packet, bundle packet instructions and reset -// DFA state. -void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, - MachineInstr *MI) { + +// End the current packet, bundle packet instructions and reset DFA state. +void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, MachineInstr *MI) { if (CurrentPacketMIs.size() > 1) { MachineInstr *MIFirst = CurrentPacketMIs.front(); finalizeBundle(*MBB, MIFirst->getIterator(), MI->getIterator()); @@ -201,7 +204,8 @@ void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, ResourceTracker->clearResources(); } -// PacketizeMIs - Bundle machine instructions into packets. + +// Bundle machine instructions into packets. void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB, MachineBasicBlock::iterator BeginItr, MachineBasicBlock::iterator EndItr) { @@ -213,25 +217,22 @@ void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB, // Generate MI -> SU map. MIToSUnit.clear(); - for (unsigned i = 0, e = VLIWScheduler->SUnits.size(); i != e; ++i) { - SUnit *SU = &VLIWScheduler->SUnits[i]; - MIToSUnit[SU->getInstr()] = SU; - } + for (SUnit &SU : VLIWScheduler->SUnits) + MIToSUnit[SU.getInstr()] = &SU; // The main packetizer loop. for (; BeginItr != EndItr; ++BeginItr) { MachineInstr *MI = BeginItr; - - this->initPacketizerState(); + initPacketizerState(); // End the current packet if needed. - if (this->isSoloInstruction(MI)) { + if (isSoloInstruction(MI)) { endPacket(MBB, MI); continue; } // Ignore pseudo instructions. - if (this->ignorePseudoInstruction(MI, MBB)) + if (ignorePseudoInstruction(MI, MBB)) continue; SUnit *SUI = MIToSUnit[MI]; @@ -241,22 +242,20 @@ void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB, bool ResourceAvail = ResourceTracker->canReserveResources(MI); if (ResourceAvail && shouldAddToPacket(MI)) { // Dependency check for MI with instructions in CurrentPacketMIs. - for (std::vector<MachineInstr*>::iterator VI = CurrentPacketMIs.begin(), - VE = CurrentPacketMIs.end(); VI != VE; ++VI) { - MachineInstr *MJ = *VI; + for (auto MJ : CurrentPacketMIs) { SUnit *SUJ = MIToSUnit[MJ]; assert(SUJ && "Missing SUnit Info!"); // Is it legal to packetize SUI and SUJ together. - if (!this->isLegalToPacketizeTogether(SUI, SUJ)) { + if (!isLegalToPacketizeTogether(SUI, SUJ)) { // Allow packetization if dependency can be pruned. - if (!this->isLegalToPruneDependencies(SUI, SUJ)) { + if (!isLegalToPruneDependencies(SUI, SUJ)) { // End the packet if dependency cannot be pruned. endPacket(MBB, MI); break; - } // !isLegalToPruneDependencies. - } // !isLegalToPacketizeTogether. - } // For all instructions in CurrentPacketMIs. + } + } + } } else { // End the packet if resource is not available, or if the instruction // shoud not be added to the current packet. @@ -264,8 +263,8 @@ void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB, } // Add MI to the current packet. - BeginItr = this->addToPacket(MI); - } // For all instructions in BB. + BeginItr = addToPacket(MI); + } // For all instructions in the packetization range. // End any packet left behind. endPacket(MBB, EndItr); |