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authorEvan Cheng <evan.cheng@apple.com>2011-12-07 07:15:52 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-12-07 07:15:52 +0000
commit7f8e563a691bf2dbe11132ad35b5e94a5b1b5325 (patch)
treef40b4bc891ec71ea6174ad0aa11bec07ffcab026 /llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
parent421caa42781e9b3af5bb3ddab9729493707d1a94 (diff)
downloadbcm5719-llvm-7f8e563a691bf2dbe11132ad35b5e94a5b1b5325.tar.gz
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Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
Diffstat (limited to 'llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp')
-rw-r--r--llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
index 84c4d59c0e4..128143e70fb 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
@@ -54,7 +54,7 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
// Clear "do not change" set.
KeepRegs.clear();
- bool IsReturnBlock = (!BB->empty() && BB->back().getDesc().isReturn());
+ bool IsReturnBlock = (!BB->empty() && BB->back().isReturn());
// Determine the live-out physregs for this block.
if (IsReturnBlock) {
@@ -193,8 +193,8 @@ void CriticalAntiDepBreaker::PrescanInstruction(MachineInstr *MI) {
// instruction which may not be executed. The second R6 def may or may not
// re-define R6 so it's not safe to change it since the last R6 use cannot be
// changed.
- bool Special = MI->getDesc().isCall() ||
- MI->getDesc().hasExtraSrcRegAllocReq() ||
+ bool Special = MI->isCall() ||
+ MI->hasExtraSrcRegAllocReq() ||
TII->isPredicated(MI);
// Scan the register operands for this instruction and update
@@ -572,7 +572,7 @@ BreakAntiDependencies(const std::vector<SUnit>& SUnits,
// If MI's defs have a special allocation requirement, don't allow
// any def registers to be changed. Also assume all registers
// defined in a call must not be changed (ABI).
- if (MI->getDesc().isCall() || MI->getDesc().hasExtraDefRegAllocReq() ||
+ if (MI->isCall() || MI->hasExtraDefRegAllocReq() ||
TII->isPredicated(MI))
// If this instruction's defs have special allocation requirement, don't
// break this anti-dependency.
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