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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-11-21 02:29:54 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-11-21 02:29:54 +0000 |
| commit | 3cea36f03e8c0b02c59e00ddcd228669f7437851 (patch) | |
| tree | a67bfcb8f728d3a3bc94d09f474789640395a7fe /llvm/lib/CodeGen/CodeGenPrepare.cpp | |
| parent | 5908affee9a96df72480d7cb963d6412a91556a2 (diff) | |
| download | bcm5719-llvm-3cea36f03e8c0b02c59e00ddcd228669f7437851.tar.gz bcm5719-llvm-3cea36f03e8c0b02c59e00ddcd228669f7437851.zip | |
[AMDGPU] Fix DAGTypeLegalizer::SplitInteger for shift amount type
DAGTypeLegalizer::SplitInteger uses default pointer size as shift amount constant type,
which causes less performant ISA in amdgcn---amdgiz target since the default pointer
type is i64 whereas the desired shift amount type is i32.
This patch fixes that by using TLI.getScalarShiftAmountTy in DAGTypeLegalizer::SplitInteger.
The X86 change is necessary since splitting i512 requires shifting amount of 256, which
cannot be held by i8.
Differential Revision: https://reviews.llvm.org/D40148
llvm-svn: 318727
Diffstat (limited to 'llvm/lib/CodeGen/CodeGenPrepare.cpp')
0 files changed, 0 insertions, 0 deletions
