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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-08-09 16:46:27 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-08-09 16:46:27 +0000 |
commit | da96006975eaf438ecec4c245a0b521c08ea594d (patch) | |
tree | f2896717f76d2b9295a6416d500435d97cc8d075 /llvm/lib/CodeGen/CalcSpillWeights.cpp | |
parent | 7874310ba116a6d100316afa5093a2698aca7de5 (diff) | |
download | bcm5719-llvm-da96006975eaf438ecec4c245a0b521c08ea594d.tar.gz bcm5719-llvm-da96006975eaf438ecec4c245a0b521c08ea594d.zip |
Move CalculateRegClass to MRI::recomputeRegClass.
This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.
llvm-svn: 137123
Diffstat (limited to 'llvm/lib/CodeGen/CalcSpillWeights.cpp')
-rw-r--r-- | llvm/lib/CodeGen/CalcSpillWeights.cpp | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/llvm/lib/CodeGen/CalcSpillWeights.cpp b/llvm/lib/CodeGen/CalcSpillWeights.cpp index e6b3bbca206..ea16a253a34 100644 --- a/llvm/lib/CodeGen/CalcSpillWeights.cpp +++ b/llvm/lib/CodeGen/CalcSpillWeights.cpp @@ -185,35 +185,3 @@ void VirtRegAuxInfo::CalculateWeightAndHint(LiveInterval &li) { li.weight = normalizeSpillWeight(totalWeight, li.getSize()); } - -void VirtRegAuxInfo::CalculateRegClass(unsigned reg) { - MachineRegisterInfo &MRI = MF.getRegInfo(); - const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); - const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); - const TargetRegisterClass *OldRC = MRI.getRegClass(reg); - const TargetRegisterClass *NewRC = TRI->getLargestLegalSuperClass(OldRC); - - // Stop early if there is no room to grow. - if (NewRC == OldRC) - return; - - // Accumulate constraints from all uses. - for (MachineRegisterInfo::reg_nodbg_iterator I = MRI.reg_nodbg_begin(reg), - E = MRI.reg_nodbg_end(); I != E; ++I) { - // TRI doesn't have accurate enough information to model this yet. - if (I.getOperand().getSubReg()) - return; - // Inline asm instuctions don't remember their constraints. - if (I->isInlineAsm()) - return; - const TargetRegisterClass *OpRC = - TII->getRegClass(I->getDesc(), I.getOperandNo(), TRI); - if (OpRC) - NewRC = getCommonSubClass(NewRC, OpRC); - if (!NewRC || NewRC == OldRC) - return; - } - DEBUG(dbgs() << "Inflating " << OldRC->getName() << ':' << PrintReg(reg) - << " to " << NewRC->getName() <<".\n"); - MRI.setRegClass(reg, NewRC); -} |