summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/AsmPrinter
diff options
context:
space:
mode:
authorAdrian Prantl <aprantl@apple.com>2015-01-14 01:01:28 +0000
committerAdrian Prantl <aprantl@apple.com>2015-01-14 01:01:28 +0000
commitad768c371936d4c76a696c79cc2478ccc25a5ad7 (patch)
treeca7526ab1aa82023891eccecf486b3cb8c71e64c /llvm/lib/CodeGen/AsmPrinter
parent658676c3eaa769423bde7760f9f43b291e315a56 (diff)
downloadbcm5719-llvm-ad768c371936d4c76a696c79cc2478ccc25a5ad7.tar.gz
bcm5719-llvm-ad768c371936d4c76a696c79cc2478ccc25a5ad7.zip
Debug Info: Emitting a register in DwarfExpression may fail. Report the
status in a bool and let the users deal with the error. NFC. llvm-svn: 225899
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter')
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp5
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp28
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h9
3 files changed, 26 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
index b13f394b4c0..e02b05c5fbd 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
@@ -244,7 +244,10 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
"nop (could not find a dwarf register number)");
// Attempt to find a valid super- or sub-register.
- return Expr.AddMachineRegPiece(MLoc.getReg());
+ if (!Expr.AddMachineRegPiece(MLoc.getReg()))
+ Expr.EmitOp(dwarf::DW_OP_nop,
+ "nop (could not find a dwarf register number)");
+ return;
}
if (MLoc.isIndirect())
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
index 4c16ae70d1f..948dc92e25e 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
@@ -89,7 +89,7 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
return true;
}
-void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
+bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) {
const TargetRegisterInfo *TRI = getTRI();
@@ -100,7 +100,7 @@ void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
AddReg(Reg);
if (PieceSizeInBits)
AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
- return;
+ return true;
}
// Walk up the super-register chain until we find a valid number.
@@ -123,7 +123,7 @@ void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
AddShr(RegOffset);
AddOpPiece(Size, PieceOffsetInBits);
}
- return;
+ return true;
}
}
@@ -162,9 +162,7 @@ void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
}
}
- if (CurPos == PieceOffsetInBits)
- // FIXME: We have no reasonable way of handling errors in here.
- EmitOp(dwarf::DW_OP_nop, "nop (could not find a dwarf register number)");
+ return CurPos > PieceOffsetInBits;
}
void DwarfExpression::AddSignedConstant(int Value) {
@@ -200,35 +198,41 @@ static unsigned getOffsetOrZero(unsigned OffsetInBits,
return OffsetInBits;
}
-void DwarfExpression::AddMachineRegExpression(DIExpression Expr,
+bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
unsigned MachineReg,
unsigned PieceOffsetInBits) {
unsigned N = Expr.getNumElements();
unsigned I = 0;
+ bool ValidReg = false;
// Pattern-match combinations for which more efficient representations exist
// first.
if (N >= 3 && Expr.getElement(0) == dwarf::DW_OP_piece) {
unsigned SizeOfByte = 8;
unsigned OffsetInBits = Expr.getElement(1) * SizeOfByte;
unsigned SizeInBits = Expr.getElement(2) * SizeOfByte;
- AddMachineRegPiece(MachineReg, SizeInBits,
- getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
+ ValidReg =
+ AddMachineRegPiece(MachineReg, SizeInBits,
+ getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
I = 3;
} else if (N >= 3 && Expr.getElement(0) == dwarf::DW_OP_plus &&
Expr.getElement(2) == dwarf::DW_OP_deref) {
// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
unsigned Offset = Expr.getElement(1);
- AddMachineRegIndirect(MachineReg, Offset);
+ ValidReg = AddMachineRegIndirect(MachineReg, Offset);
I = 3;
} else if (N >= 1 && Expr.getElement(0) == dwarf::DW_OP_deref) {
// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
- AddMachineRegIndirect(MachineReg);
+ ValidReg = AddMachineRegIndirect(MachineReg);
I = 1;
} else
- AddMachineRegPiece(MachineReg);
+ ValidReg = AddMachineRegPiece(MachineReg);
+
+ if (!ValidReg)
+ return false;
// Emit remaining elements of the expression.
AddExpression(Expr, I);
+ return true;
}
void DwarfExpression::AddExpression(DIExpression Expr, unsigned I,
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
index 4df958c5a03..c31d75355f9 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
@@ -62,7 +62,7 @@ public:
void AddShr(unsigned ShiftBy);
/// Emit an indirect dwarf register operation for the given machine register.
- /// Returns false if no DWARF register exists for MachineReg.
+ /// \return false if no DWARF register exists for MachineReg.
bool AddMachineRegIndirect(unsigned MachineReg, int Offset = 0);
/// \brief Emit a partial DWARF register operation.
@@ -77,7 +77,9 @@ public:
/// function will attempt to emit a DWARF register by emitting a
/// piece of a super-register or by piecing together multiple
/// subregisters that alias the register.
- void AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
+ ///
+ /// \return false if no DWARF register exists for MachineReg.
+ bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
unsigned PieceOffsetInBits = 0);
/// Emit a signed constant.
@@ -88,7 +90,8 @@ public:
/// Emit an entire DIExpression on top of a machine register location.
/// \param PieceOffsetInBits If this is one piece out of a fragmented
/// location, this is the offset of the piece inside the entire variable.
- void AddMachineRegExpression(DIExpression Expr, unsigned MachineReg,
+ /// \return false if no DWARF register exists for MachineReg.
+ bool AddMachineRegExpression(DIExpression Expr, unsigned MachineReg,
unsigned PieceOffsetInBits = 0);
/// Emit a the operations in a DIExpression, starting from element I.
/// \param PieceOffsetInBits If this is one piece out of a fragmented
OpenPOWER on IntegriCloud