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| author | Hal Finkel <hfinkel@anl.gov> | 2014-01-02 21:38:26 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-01-02 21:38:26 +0000 |
| commit | 1d429f2ee0fe16eb08d62a870767908f414b0062 (patch) | |
| tree | d7e240adc68fff96b3b3a306f2706182f3711413 /llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | |
| parent | d8beca3b785bd3c9a68bf020443d2f226e9085ce (diff) | |
| download | bcm5719-llvm-1d429f2ee0fe16eb08d62a870767908f414b0062.tar.gz bcm5719-llvm-1d429f2ee0fe16eb08d62a870767908f414b0062.zip | |
[PPC] Fix the scheduling of CR logicals on the P7
CR logicals (crand, crxor, etc.) on the P7 need to be in the first slot of each
dispatch group. The old itinerary entry was just wrong (but has not mattered
because we don't generate these instructions).
This will matter when, in an upcoming commit, we start generating these
instructions.
llvm-svn: 198359
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp')
0 files changed, 0 insertions, 0 deletions
