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authorCraig Topper <craig.topper@intel.com>2019-04-09 23:30:36 +0000
committerCraig Topper <craig.topper@intel.com>2019-04-09 23:30:36 +0000
commit7143224272aa1e0023c6f9e4621bf6eece38249b (patch)
tree899096aca8202f2f241c7c7b273aed6dc8e53b89 /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
parent50f726d73a419b8b4c02bf2702943cbf71e5c2a4 (diff)
downloadbcm5719-llvm-7143224272aa1e0023c6f9e4621bf6eece38249b.tar.gz
bcm5719-llvm-7143224272aa1e0023c6f9e4621bf6eece38249b.zip
[X86] Add VEX_LIG to scalar VEX/EVEX instructions that were missing it.
Scalar VEX/EVEX instructions don't use the L bit and don't look at it for decoding either. So we should ignore it in our disassembler. The missing instructions here were found by grepping the raw tablegen class definitions in the tablegen debug output. llvm-svn: 358040
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp')
0 files changed, 0 insertions, 0 deletions
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