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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-11-02 17:03:11 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-11-02 17:03:11 +0000 |
| commit | 368972c3b3b8ad62fa064b495223809074c39115 (patch) | |
| tree | 2d31d32089b5d1ecd67411563199f8064d9f5caa /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | |
| parent | e9da8a8ec0b90a17e192d91c4d67ef42d3d6595e (diff) | |
| download | bcm5719-llvm-368972c3b3b8ad62fa064b495223809074c39115.tar.gz bcm5719-llvm-368972c3b3b8ad62fa064b495223809074c39115.zip | |
AMDGPU: Allow additional implicit operands on MOVRELS instructions
Summary:
The post-RA scheduler occasionally uses additional implicit operands when
the vector implicit operand as a whole is killed, but some subregisters
are still live because they are directly referenced later. Unfortunately,
this seems incredibly subtle to reproduce.
Fixes piglit spec/glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-wr.shader_test
and others.
Reviewers: arsenm, tstellarAMD
Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D25656
llvm-svn: 285835
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp')
0 files changed, 0 insertions, 0 deletions
