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author | Adrian Prantl <aprantl@apple.com> | 2014-02-11 21:22:59 +0000 |
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committer | Adrian Prantl <aprantl@apple.com> | 2014-02-11 21:22:59 +0000 |
commit | a83cc8a3564ae84ae4d864ad7d0d469e85239467 (patch) | |
tree | c54a861248d45b9185823fe9040f102ebb0ea563 /llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | |
parent | 6f84d31540e2c34faea5f98aec0d63fc9500590e (diff) | |
download | bcm5719-llvm-a83cc8a3564ae84ae4d864ad7d0d469e85239467.tar.gz bcm5719-llvm-a83cc8a3564ae84ae4d864ad7d0d469e85239467.zip |
Debug info: Emit values in subregisters that do not have a separate
DWARF register number by emitting a super-register + DW_OP_bit_piece.
This is necessary because on x86_64, there are no DWARF register numbers
for i386-style subregisters.
Fixes a bunch of FIXMEs.
rdar://problem/16015314
llvm-svn: 201180
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp')
-rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index bab8aad497f..09aedc4cc93 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -868,12 +868,14 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, bool Indirect) const { const TargetRegisterInfo *TRI = TM.getRegisterInfo(); int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false); + bool isSubRegister = Reg < 0; + unsigned Idx = 0; for (MCSuperRegIterator SR(MLoc.getReg(), TRI); SR.isValid() && Reg < 0; ++SR) { Reg = TRI->getDwarfRegNum(*SR, false); - // FIXME: Get the bit range this register uses of the superregister - // so that we can produce a DW_OP_bit_piece + if (Reg >= 0) + Idx = TRI->getSubRegIndex(*SR, MLoc.getReg()); } // FIXME: Handle cases like a super register being encoded as @@ -910,7 +912,24 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, } } - // FIXME: Produce a DW_OP_bit_piece if we used a superregister + // Emit Mask + if (isSubRegister) { + unsigned Size = TRI->getSubRegIdxSize(Idx); + unsigned Offset = TRI->getSubRegIdxOffset(Idx); + if (Offset > 0) { + OutStreamer.AddComment("DW_OP_bit_piece"); + EmitInt8(dwarf::DW_OP_bit_piece); + OutStreamer.AddComment(Twine(Size)); + EmitULEB128(Size); + OutStreamer.AddComment(Twine(Offset)); + EmitULEB128(Offset); + } else { + OutStreamer.AddComment("DW_OP_piece"); + EmitInt8(dwarf::DW_OP_piece); + OutStreamer.AddComment(Twine(Size)); + EmitULEB128(Size); + } + } } bool AsmPrinter::doFinalization(Module &M) { |