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authorDan Gohman <gohman@apple.com>2010-02-09 00:02:37 +0000
committerDan Gohman <gohman@apple.com>2010-02-09 00:02:37 +0000
commit227077d1bec801b8e021b0c5b05240dd731a72f1 (patch)
treef02c8116cc618c6adcf761ee05b8e697b7414780 /llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
parent9a9d9ea7bcadc2e58b3b37b795ad6b416ef2cf99 (diff)
downloadbcm5719-llvm-227077d1bec801b8e021b0c5b05240dd731a72f1.tar.gz
bcm5719-llvm-227077d1bec801b8e021b0c5b05240dd731a72f1.zip
Implement AsmPrinter support for several more operators which have
direct MCExpr equivalents. Don't use MCExpr::Shr because it isn't consistent between targets. llvm-svn: 95620
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp')
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 3a79cf30772..ca2085f77f8 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -963,8 +963,14 @@ static const MCExpr *LowerConstant(const Constant *CV, AsmPrinter &AP) {
return MCBinaryExpr::CreateAnd(OpExpr, MaskExpr, Ctx);
}
+ // The MC library also has a right-shift operator, but it isn't consistently
+ // signed or unsigned between different targets.
case Instruction::Add:
case Instruction::Sub:
+ case Instruction::Mul:
+ case Instruction::SDiv:
+ case Instruction::SRem:
+ case Instruction::Shl:
case Instruction::And:
case Instruction::Or:
case Instruction::Xor: {
@@ -974,6 +980,10 @@ static const MCExpr *LowerConstant(const Constant *CV, AsmPrinter &AP) {
default: llvm_unreachable("Unknown binary operator constant cast expr");
case Instruction::Add: return MCBinaryExpr::CreateAdd(LHS, RHS, Ctx);
case Instruction::Sub: return MCBinaryExpr::CreateSub(LHS, RHS, Ctx);
+ case Instruction::Mul: return MCBinaryExpr::CreateMul(LHS, RHS, Ctx);
+ case Instruction::SDiv: return MCBinaryExpr::CreateDiv(LHS, RHS, Ctx);
+ case Instruction::SRem: return MCBinaryExpr::CreateMod(LHS, RHS, Ctx);
+ case Instruction::Shl: return MCBinaryExpr::CreateShl(LHS, RHS, Ctx);
case Instruction::And: return MCBinaryExpr::CreateAnd(LHS, RHS, Ctx);
case Instruction::Or: return MCBinaryExpr::CreateOr (LHS, RHS, Ctx);
case Instruction::Xor: return MCBinaryExpr::CreateXor(LHS, RHS, Ctx);
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