diff options
author | David Blaikie <dblaikie@gmail.com> | 2013-06-16 20:34:15 +0000 |
---|---|---|
committer | David Blaikie <dblaikie@gmail.com> | 2013-06-16 20:34:15 +0000 |
commit | 0252265be09bcd94c72cea95e21a773b3ea1c638 (patch) | |
tree | 8a36a32a3f4d9d42ada095959fcf6cdc2ebc598d /llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | |
parent | 80d055494973e23dda00914c8f214e289831a341 (diff) | |
download | bcm5719-llvm-0252265be09bcd94c72cea95e21a773b3ea1c638.tar.gz bcm5719-llvm-0252265be09bcd94c72cea95e21a773b3ea1c638.zip |
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in
DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
reduces the complexity of debug info handling down to two
representations of values (reg+offset and frame index+offset) rather
than three or four.
Ideally we could ensure that frame indicies had been eliminated by the
time we reached an assembly or dwarf generation, but I haven't spent the
time to figure out where the FIs are leaking through into that & whether
there's a good place to convert them. Some FI+offset=>reg+offset
conversion is done (see PrologEpilogInserter, for example) which is
necessary for some SelectionDAG assumptions about registers, I believe,
but it might be possible to make this a more thorough conversion &
ensure there are no remaining FIs no matter how instruction selection
is performed.
llvm-svn: 184066
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp')
-rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 9b392649283..842381b42a5 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -42,6 +42,7 @@ #include "llvm/Support/MathExtras.h" #include "llvm/Support/Timer.h" #include "llvm/Target/Mangler.h" +#include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetLoweringObjectFile.h" @@ -591,8 +592,17 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) { } else if (MI->getOperand(0).isCImm()) { MI->getOperand(0).getCImm()->getValue().print(OS, false /*isSigned*/); } else { - assert(MI->getOperand(0).isReg() && "Unknown operand type"); - unsigned Reg = MI->getOperand(0).getReg(); + unsigned Reg; + if (MI->getOperand(0).isReg()) { + Reg = MI->getOperand(0).getReg(); + Deref = Offset != 0; // FIXME: use a better sentinel value so that deref + // of a reg with a zero offset is valid + } else { + assert(MI->getOperand(0).isFI() && "Unknown operand type"); + const TargetFrameLowering *TFI = AP.TM.getFrameLowering(); + Offset += TFI->getFrameIndexReference(*AP.MF, MI->getOperand(0).getIndex(), Reg); + Deref = true; + } if (Reg == 0) { // Suppress offset, it is not meaningful here. OS << "undef"; @@ -600,8 +610,6 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) { AP.OutStreamer.EmitRawText(OS.str()); return true; } - Deref = Offset != 0; // FIXME: use a better sentinel value so that deref of - // a reg with a zero offset is valid if (Deref) OS << '['; OS << AP.TM.getRegisterInfo()->getName(Reg); |