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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-18 00:20:43 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-18 00:20:43 +0000 |
| commit | cfdc2b9bd92bb27fd8d69a47158731e03b5ad769 (patch) | |
| tree | ad3a24a7c794e6322e802f8b602f93b1edbc8a3d /llvm/lib/CodeGen/AsmPrinter/AddressPool.h | |
| parent | 8651ec6a84498f8b81a74a1f89ce60c29a2984bf (diff) | |
| download | bcm5719-llvm-cfdc2b9bd92bb27fd8d69a47158731e03b5ad769.tar.gz bcm5719-llvm-cfdc2b9bd92bb27fd8d69a47158731e03b5ad769.zip | |
AMDGPU: Disambiguate v3f16 format in load/store tables
Currently the searchable tables report the number of dwords. These
round to the same number for 3 and 4 component d16
instructions. Change this to report the number of elements so this
isn't ambiguous.
llvm-svn: 369202
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/AddressPool.h')
0 files changed, 0 insertions, 0 deletions
