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authorDevang Patel <dpatel@apple.com>2011-06-02 21:26:52 +0000
committerDevang Patel <dpatel@apple.com>2011-06-02 21:26:52 +0000
commitf02a376fbc2ce1f4bc160986874be6e39d7b9685 (patch)
treea3d3b10b602316a854da508d09645c41938b26cd /llvm/lib/CodeGen/AntiDepBreaker.h
parentf0759ef2719e6161cdb85717a2ae5f3b5fe0bad7 (diff)
downloadbcm5719-llvm-f02a376fbc2ce1f4bc160986874be6e39d7b9685.tar.gz
bcm5719-llvm-f02a376fbc2ce1f4bc160986874be6e39d7b9685.zip
Update DBG_VALUEs while breaking anti dependencies.
llvm-svn: 132487
Diffstat (limited to 'llvm/lib/CodeGen/AntiDepBreaker.h')
-rw-r--r--llvm/lib/CodeGen/AntiDepBreaker.h18
1 files changed, 15 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/AntiDepBreaker.h b/llvm/lib/CodeGen/AntiDepBreaker.h
index 086b7579563..df47f984d57 100644
--- a/llvm/lib/CodeGen/AntiDepBreaker.h
+++ b/llvm/lib/CodeGen/AntiDepBreaker.h
@@ -30,6 +30,9 @@ namespace llvm {
/// anti-dependencies.
class AntiDepBreaker {
public:
+ typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
+ DbgValueVector;
+
virtual ~AntiDepBreaker();
/// Start - Initialize anti-dep breaking for a new basic block.
@@ -40,9 +43,10 @@ public:
/// the number of anti-dependencies broken.
///
virtual unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
- MachineBasicBlock::iterator Begin,
- MachineBasicBlock::iterator End,
- unsigned InsertPosIndex) =0;
+ MachineBasicBlock::iterator Begin,
+ MachineBasicBlock::iterator End,
+ unsigned InsertPosIndex,
+ DbgValueVector &DbgValues) = 0;
/// Observe - Update liveness information to account for the current
/// instruction, which will not be scheduled.
@@ -52,6 +56,14 @@ public:
/// Finish - Finish anti-dep breaking for a basic block.
virtual void FinishBlock() =0;
+
+ /// UpdateDbgValue - Update DBG_VALUE if dependency breaker is updating
+ /// other machine instruction to use NewReg.
+ void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
+ assert (MI->isDebugValue() && "MI is not DBG_VALUE!");
+ if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg)
+ MI->getOperand(0).setReg(NewReg);
+ }
};
}
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