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authorReid Spencer <rspencer@reidspencer.com>2007-02-02 02:16:23 +0000
committerReid Spencer <rspencer@reidspencer.com>2007-02-02 02:16:23 +0000
commit2341c22ec71aed773101eef6bc725df2047e5154 (patch)
tree453d820479bbe83769e54e01abc702ac8ef71312 /llvm/lib/Bytecode
parent48b094d9ddbca690da41f5711d8e1fcb46c50e05 (diff)
downloadbcm5719-llvm-2341c22ec71aed773101eef6bc725df2047e5154.tar.gz
bcm5719-llvm-2341c22ec71aed773101eef6bc725df2047e5154.zip
Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits on large integer types. This changes the syntax for llvm assembly to make shl, ashr and lshr instructions look like a binary operator: shl i32 %X, 1 instead of shl i32 %X, i8 1 Additionally, this should help a few passes perform additional optimizations. llvm-svn: 33776
Diffstat (limited to 'llvm/lib/Bytecode')
-rw-r--r--llvm/lib/Bytecode/Reader/Reader.cpp7
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/Bytecode/Reader/Reader.cpp b/llvm/lib/Bytecode/Reader/Reader.cpp
index c649a3b19cc..e2505cc81e8 100644
--- a/llvm/lib/Bytecode/Reader/Reader.cpp
+++ b/llvm/lib/Bytecode/Reader/Reader.cpp
@@ -607,13 +607,6 @@ void BytecodeReader::ParseInstruction(std::vector<unsigned> &Oprnds,
static_cast<unsigned short>(Oprnds[2]),
getValue(iType, Oprnds[0]), getValue(iType, Oprnds[1]));
break;
- case Instruction::Shl:
- case Instruction::LShr:
- case Instruction::AShr:
- Result = new ShiftInst(Instruction::OtherOps(Opcode),
- getValue(iType, Oprnds[0]),
- getValue(Int8TySlot, Oprnds[1]));
- break;
case Instruction::Ret:
if (Oprnds.size() == 0)
Result = new ReturnInst();
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