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authorChristopher Lamb <christopher.lamb@gmail.com>2007-04-21 08:16:25 +0000
committerChristopher Lamb <christopher.lamb@gmail.com>2007-04-21 08:16:25 +0000
commitbff50208c8622fbcf8c8fdaac61ff81670de1423 (patch)
treeab39674971382d5bb5d26ac2f3eef372113d986d /llvm/lib/Bytecode/Writer
parent64995e1b3f9311c8a44af06e4bd1d8d49c4dc862 (diff)
downloadbcm5719-llvm-bff50208c8622fbcf8c8fdaac61ff81670de1423.tar.gz
bcm5719-llvm-bff50208c8622fbcf8c8fdaac61ff81670de1423.zip
add support for alignment attributes on load/store instructions
llvm-svn: 36301
Diffstat (limited to 'llvm/lib/Bytecode/Writer')
-rw-r--r--llvm/lib/Bytecode/Writer/Writer.cpp32
1 files changed, 27 insertions, 5 deletions
diff --git a/llvm/lib/Bytecode/Writer/Writer.cpp b/llvm/lib/Bytecode/Writer/Writer.cpp
index 4688e69ef2f..1dd0dc923a5 100644
--- a/llvm/lib/Bytecode/Writer/Writer.cpp
+++ b/llvm/lib/Bytecode/Writer/Writer.cpp
@@ -616,7 +616,7 @@ void BytecodeWriter::outputInstruction(const Instruction &I) {
unsigned Opcode = I.getOpcode();
unsigned NumOperands = I.getNumOperands();
- // Encode 'tail call' as 61, 'volatile load' as 62, and 'volatile store' as
+ // Encode 'tail call' as 61
// 63.
if (const CallInst *CI = dyn_cast<CallInst>(&I)) {
if (CI->getCallingConv() == CallingConv::C) {
@@ -632,10 +632,6 @@ void BytecodeWriter::outputInstruction(const Instruction &I) {
} else {
Opcode = 58; // Call escape sequence.
}
- } else if (isa<LoadInst>(I) && cast<LoadInst>(I).isVolatile()) {
- Opcode = 62;
- } else if (isa<StoreInst>(I) && cast<StoreInst>(I).isVolatile()) {
- Opcode = 63;
}
// Figure out which type to encode with the instruction. Typically we want
@@ -744,6 +740,32 @@ void BytecodeWriter::outputInstruction(const Instruction &I) {
} else if (isa<InvokeInst>(I)) {
// Invoke escape seq has at least 4 operands to encode.
++NumOperands;
+ } else if (const LoadInst *LI = dyn_cast<LoadInst>(&I)) {
+ // Encode attributed load as opcode 62
+ // We need to encode the attributes of the load instruction as the second
+ // operand. Its not really a slot, but we don't want to break the
+ // instruction format for these instructions.
+ if (LI->getAlignment() || LI->isVolatile()) {
+ NumOperands = 2;
+ Slots[1] = ((Log2_32(LI->getAlignment())+1)<<1) +
+ (LI->isVolatile() ? 1 : 0);
+ if (Slots[1] > MaxOpSlot)
+ MaxOpSlot = Slots[1];
+ Opcode = 62;
+ }
+ } else if (const StoreInst *SI = dyn_cast<StoreInst>(&I)) {
+ // Encode attributed store as opcode 63
+ // We need to encode the attributes of the store instruction as the third
+ // operand. Its not really a slot, but we don't want to break the
+ // instruction format for these instructions.
+ if (SI->getAlignment() || SI->isVolatile()) {
+ NumOperands = 3;
+ Slots[2] = ((Log2_32(SI->getAlignment())+1)<<1) +
+ (SI->isVolatile() ? 1 : 0);
+ if (Slots[2] > MaxOpSlot)
+ MaxOpSlot = Slots[2];
+ Opcode = 63;
+ }
}
// Decide which instruction encoding to use. This is determined primarily
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