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| author | Reid Spencer <rspencer@reidspencer.com> | 2006-11-02 01:53:59 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2006-11-02 01:53:59 +0000 |
| commit | 7eb55b395fdbbdbd113aabb6cad51cc98b379af0 (patch) | |
| tree | 2666f67e03e73fc890b7277073186b32ead86d50 /llvm/lib/Bytecode/Reader/Reader.cpp | |
| parent | 57382066e875c05e58f35db5976a22ed5dcdebf8 (diff) | |
| download | bcm5719-llvm-7eb55b395fdbbdbd113aabb6cad51cc98b379af0.tar.gz bcm5719-llvm-7eb55b395fdbbdbd113aabb6cad51cc98b379af0.zip | |
For PR950:
Replace the REM instruction with UREM, SREM and FREM.
llvm-svn: 31369
Diffstat (limited to 'llvm/lib/Bytecode/Reader/Reader.cpp')
| -rw-r--r-- | llvm/lib/Bytecode/Reader/Reader.cpp | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/llvm/lib/Bytecode/Reader/Reader.cpp b/llvm/lib/Bytecode/Reader/Reader.cpp index d3df471a1c2..b1ec74e2d6c 100644 --- a/llvm/lib/Bytecode/Reader/Reader.cpp +++ b/llvm/lib/Bytecode/Reader/Reader.cpp @@ -652,7 +652,14 @@ BytecodeReader::handleObsoleteOpcodes( break; case 11: // Rem - Opcode = Instruction::Rem; + // As with "Div", make the signed/unsigned or floating point Rem + // instruction choice based on the type of the operands. + if (iType == 10 || iType == 11) + Opcode = Instruction::FRem; + else if (iType >= 2 && iType <= 9 && iType % 2 != 0) + Opcode = Instruction::SRem; + else + Opcode = Instruction::URem; break; case 12: // And Opcode = Instruction::And; @@ -1654,18 +1661,16 @@ inline unsigned fixCEOpcodes( else Opcode = Instruction::UDiv; break; - case 11: // Rem - // As with "Div", make the signed/unsigned Rem instruction choice based - // on the type of the instruction. + // As with "Div", make the signed/unsigned or floating point Rem + // instruction choice based on the type of the operands. if (ArgVec[0]->getType()->isFloatingPoint()) - Opcode = Instruction::Rem; + Opcode = Instruction::FRem; else if (ArgVec[0]->getType()->isSigned()) - Opcode = Instruction::Rem; + Opcode = Instruction::SRem; else - Opcode = Instruction::Rem; + Opcode = Instruction::URem; break; - case 12: // And Opcode = Instruction::And; break; |
