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| author | Eli Friedman <efriedma@codeaurora.org> | 2019-01-22 01:51:37 +0000 |
|---|---|---|
| committer | Eli Friedman <efriedma@codeaurora.org> | 2019-01-22 01:51:37 +0000 |
| commit | 1eaa04d682d684f7e83c263aa40e78ae8faab378 (patch) | |
| tree | 7c830e0e619839a838c8f558b3250dd6ff69f6ec /llvm/lib/Bitcode | |
| parent | 390c0e2f728e4e5feb89301eb758a67ae296d350 (diff) | |
| download | bcm5719-llvm-1eaa04d682d684f7e83c263aa40e78ae8faab378.tar.gz bcm5719-llvm-1eaa04d682d684f7e83c263aa40e78ae8faab378.zip | |
[ARM] Combine ands+lsls to lsls+lsrs for Thumb1.
This patch may seem familiar... but my previous patch handled the
equivalent lsls+and, not this case. Usually instcombine puts the
"and" after the shift, so this case doesn't come up. However, if the
shift comes out of a GEP, it won't get canonicalized by instcombine,
and DAGCombine doesn't have an equivalent transform.
This also modifies isDesirableToCommuteWithShift to suppress DAGCombine
transforms which would make the overall code worse.
I'm not really happy adding a bunch of code to handle this, but it would
probably be tricky to substantially improve the behavior of DAGCombine
here.
Differential Revision: https://reviews.llvm.org/D56032
llvm-svn: 351776
Diffstat (limited to 'llvm/lib/Bitcode')
0 files changed, 0 insertions, 0 deletions
