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authorSanjay Patel <spatel@rotateright.com>2019-05-22 15:50:46 +0000
committerSanjay Patel <spatel@rotateright.com>2019-05-22 15:50:46 +0000
commit5a4f7cf2ff3fc15d82ca062ee64dd8bd01a68883 (patch)
tree6fb5af1a3e04d75d44d0a65c713d4042cf37a445 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
parent63305c8fbba7b3b852f43fb2e05b9752097f13ba (diff)
downloadbcm5719-llvm-5a4f7cf2ff3fc15d82ca062ee64dd8bd01a68883.tar.gz
bcm5719-llvm-5a4f7cf2ff3fc15d82ca062ee64dd8bd01a68883.zip
[IR] allow fast-math-flags on select of FP values
This is a minimal start to correcting a problem most directly discussed in PR38086: https://bugs.llvm.org/show_bug.cgi?id=38086 We have been hacking around a limitation for FP select patterns by using the fast-math-flags on the condition of the select rather than the select itself. This patch just allows FMF to appear with the 'select' opcode. No changes are needed to "FPMathOperator" because it already includes select-of-FP because that definition is based on the (return) value type. Once we have this ability, we can start correcting and adding IR transforms to use the FMF on a 'select' instruction. The instcombine and vectorizer test diffs only show that the IRBuilder change is behaving as expected by applying an FMF guard value to 'select'. For reference: rL241901 - allowed FMF with fcmp rL255555 - allowed FMF with FP calls Differential Revision: https://reviews.llvm.org/D61917 llvm-svn: 361401
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
-rw-r--r--llvm/lib/Bitcode/Writer/BitcodeWriter.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index 63b0aabb58e..7d9b0583d1e 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -2636,12 +2636,16 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
Vals.append(IVI->idx_begin(), IVI->idx_end());
break;
}
- case Instruction::Select:
+ case Instruction::Select: {
Code = bitc::FUNC_CODE_INST_VSELECT;
pushValueAndType(I.getOperand(1), InstID, Vals);
pushValue(I.getOperand(2), InstID, Vals);
pushValueAndType(I.getOperand(0), InstID, Vals);
+ uint64_t Flags = getOptimizationFlags(&I);
+ if (Flags != 0)
+ Vals.push_back(Flags);
break;
+ }
case Instruction::ExtractElement:
Code = bitc::FUNC_CODE_INST_EXTRACTELT;
pushValueAndType(I.getOperand(0), InstID, Vals);
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